856e93713c
There is no reason to use these over fpext/fptrunc and bitcast.
Split out from #174484. The test coverage is also shockingly bad,
so adds a new wasm test which shows different contexts the intrinsics
are used.
I've also reverted this to a more conservative version that leaves the
useFP16ConversionIntrinsics configuration in place, and only replaces
the exact intrinsic usage. This should be removed, but it seems to have
turned into a buggy ABI option. Some contexts which probably meant to
check NativeHalfType or NativeHalfArgsAndReturns were relying on this
instead. Additionally, some of the SVE intrinsics appear to be using
__fp16 but really expect _Float16 treatment.
40 lines
1.8 KiB
C
40 lines
1.8 KiB
C
// RUN: %clang_cc1 -triple s390x-linux-gnu -emit-llvm -o - %s \
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// RUN: | FileCheck %s
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void f(__fp16 *a, __fp16 *b, __fp16 *c, __fp16 *d, __fp16 *e) {
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*e = (*a) * (*b) + (*c) * (*d);
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}
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// CHECK-LABEL: define dso_local void @f(ptr noundef %a, ptr noundef %b, ptr noundef %c, ptr noundef %d, ptr noundef %e) #0 {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: %a.addr = alloca ptr, align 8
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// CHECK-NEXT: %b.addr = alloca ptr, align 8
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// CHECK-NEXT: %c.addr = alloca ptr, align 8
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// CHECK-NEXT: %d.addr = alloca ptr, align 8
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// CHECK-NEXT: %e.addr = alloca ptr, align 8
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// CHECK-NEXT: store ptr %a, ptr %a.addr, align 8
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// CHECK-NEXT: store ptr %b, ptr %b.addr, align 8
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// CHECK-NEXT: store ptr %c, ptr %c.addr, align 8
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// CHECK-NEXT: store ptr %d, ptr %d.addr, align 8
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// CHECK-NEXT: store ptr %e, ptr %e.addr, align 8
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// CHECK-NEXT: %0 = load ptr, ptr %a.addr, align 8
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// CHECK-NEXT: %1 = load half, ptr %0, align 2
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// CHECK-NEXT: %conv = fpext half %1 to float
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// CHECK-NEXT: %2 = load ptr, ptr %b.addr, align 8
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// CHECK-NEXT: %3 = load half, ptr %2, align 2
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// CHECK-NEXT: %conv1 = fpext half %3 to float
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// CHECK-NEXT: %mul = fmul float %conv, %conv1
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// CHECK-NEXT: %4 = load ptr, ptr %c.addr, align 8
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// CHECK-NEXT: %5 = load half, ptr %4, align 2
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// CHECK-NEXT: %conv2 = fpext half %5 to float
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// CHECK-NEXT: %6 = load ptr, ptr %d.addr, align 8
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// CHECK-NEXT: %7 = load half, ptr %6, align 2
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// CHECK-NEXT: %conv3 = fpext half %7 to float
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// CHECK-NEXT: %mul4 = fmul float %conv2, %conv3
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// CHECK-NEXT: %add = fadd float %mul, %mul4
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// CHECK-NEXT: %conv5 = fptrunc float %add to half
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// CHECK-NEXT: %8 = load ptr, ptr %e.addr, align 8
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// CHECK-NEXT: store half %conv5, ptr %8, align 2
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// CHECK-NEXT: ret void
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// CHECK-NEXT: }
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