0928368f62
This adds the Arm Optimized Routines (see https://github.com/ARM-software/optimized-routines) source code under the the LLVM license. The version of the code provided in this patch is v20.02 of the Arm Optimized Routines project. This entire contribution is being committed as is even though it does not currently fit the LLVM libc model and does not follow the LLVM coding style. In the near future, implementations from this patch will be moved over to their right place in the LLVM-libc tree. This will be done over many small patches, all of which will go through the normal LLVM code review process. See this libc-dev post for the plan: http://lists.llvm.org/pipermail/libc-dev/2020-March/000044.html Differential revision of the original upload: https://reviews.llvm.org/D75355
88 lines
2.1 KiB
C
88 lines
2.1 KiB
C
/*
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* Double-precision vector sin function.
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*/
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#include "mathlib.h"
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#include "v_math.h"
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#if V_SUPPORTED
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static const double Poly[] = {
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/* worst-case error is 3.5 ulp.
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abs error: 0x1.be222a58p-53 in [-pi/2, pi/2]. */
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-0x1.9f4a9c8b21dc9p-41,
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0x1.60e88a10163f2p-33,
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-0x1.ae6361b7254e7p-26,
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0x1.71de382e8d62bp-19,
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-0x1.a01a019aeb4ffp-13,
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0x1.111111110b25ep-7,
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-0x1.55555555554c3p-3,
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};
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#define C7 v_f64 (Poly[0])
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#define C6 v_f64 (Poly[1])
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#define C5 v_f64 (Poly[2])
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#define C4 v_f64 (Poly[3])
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#define C3 v_f64 (Poly[4])
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#define C2 v_f64 (Poly[5])
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#define C1 v_f64 (Poly[6])
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#define InvPi v_f64 (0x1.45f306dc9c883p-2)
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#define Pi1 v_f64 (0x1.921fb54442d18p+1)
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#define Pi2 v_f64 (0x1.1a62633145c06p-53)
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#define Pi3 v_f64 (0x1.c1cd129024e09p-106)
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#define Shift v_f64 (0x1.8p52)
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#define RangeVal v_f64 (0x1p23)
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#define AbsMask v_u64 (0x7fffffffffffffff)
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VPCS_ATTR
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__attribute__ ((noinline)) static v_f64_t
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specialcase (v_f64_t x, v_f64_t y, v_u64_t cmp)
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{
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return v_call_f64 (sin, x, y, cmp);
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}
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VPCS_ATTR
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v_f64_t
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V_NAME(sin) (v_f64_t x)
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{
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v_f64_t n, r, r2, y;
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v_u64_t sign, odd, cmp;
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r = v_as_f64_u64 (v_as_u64_f64 (x) & AbsMask);
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sign = v_as_u64_f64 (x) & ~AbsMask;
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cmp = v_cond_u64 (v_as_u64_f64 (r) >= v_as_u64_f64 (RangeVal));
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/* n = rint(|x|/pi). */
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n = v_fma_f64 (InvPi, r, Shift);
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odd = v_as_u64_f64 (n) << 63;
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n -= Shift;
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/* r = |x| - n*pi (range reduction into -pi/2 .. pi/2). */
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r = v_fma_f64 (-Pi1, n, r);
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r = v_fma_f64 (-Pi2, n, r);
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r = v_fma_f64 (-Pi3, n, r);
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/* sin(r) poly approx. */
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r2 = r * r;
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y = v_fma_f64 (C7, r2, C6);
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y = v_fma_f64 (y, r2, C5);
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y = v_fma_f64 (y, r2, C4);
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y = v_fma_f64 (y, r2, C3);
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y = v_fma_f64 (y, r2, C2);
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y = v_fma_f64 (y, r2, C1);
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y = v_fma_f64 (y * r2, r, r);
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/* sign. */
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y = v_as_f64_u64 (v_as_u64_f64 (y) ^ sign ^ odd);
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if (unlikely (v_any_u64 (cmp)))
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return specialcase (x, y, cmp);
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return y;
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}
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VPCS_ALIAS
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#endif
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