37801e9e99
Previously, `computeProcResourceMasks()` would print resource masks on debug mode from multiple call sites, creating noise in the debug output. This patch aims to fix this and also print more info about the resources. It splits to 2 types of debug prints for resources: 1. No simulation - mask only 2. Simulation - mask + other info For 2, it shares printing on a single place in `ResourceManager` constructor, that should cover all the other simulation cases indirectly: 1. `llvm/lib/MCA/HardwareUnits/ResourceManager` - covered 2. `llvm/lib/MCA/InstrBuilder.c` - should be covered indirectly - only used by `llvm-mca` before simulation that constructs a `ResourceManager` 3. `llvm/tools/llvm-mca/Views/SummaryView.cpp` - after simulation that constructs a `ResourceManager` 4. `llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp` - after simulation that constructs a `ResourceManager` It also adds `BufferSize` to the output, which should be useful to debug scheduling model + MCA integration. For 1, it inlines mask-only printing into 2 other callers: 1. `llvm/include/llvm/MCA/Stages/InstructionTables.h` 2. `llvm/tools/llvm-exegesis/lib/SchedClassResolution.cpp` as they only use the masks there. I think this is a reasonable duplication across distinguishably different users/tools. Now every pair of callers, even across groups (1 and 2), effectively print in a mutually exclusive way. The patch adds debug tests for the 3 new callers, in the corresponding root test directories, to drive further location of logically target-independent tests that just require some target at the root. I think this convention is more discoverable, and is pretty widely used in the project.
113 lines
4.1 KiB
C++
113 lines
4.1 KiB
C++
//===--------------------- Support.cpp --------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file implements a few helper functions used by various pipeline
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/// components.
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///
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//===----------------------------------------------------------------------===//
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#include "llvm/MCA/Support.h"
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#include "llvm/MC/MCSchedule.h"
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#include "llvm/Support/Debug.h"
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#include <numeric>
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namespace llvm {
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namespace mca {
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#define DEBUG_TYPE "llvm-mca"
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ReleaseAtCycles &ReleaseAtCycles::operator+=(const ReleaseAtCycles &RHS) {
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if (Denominator == RHS.Denominator)
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Numerator += RHS.Numerator;
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else {
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// Create a common denominator for LHS and RHS by calculating the least
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// common multiple from the GCD.
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unsigned GCD = std::gcd(Denominator, RHS.Denominator);
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unsigned LCM = (Denominator * RHS.Denominator) / GCD;
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unsigned LHSNumerator = Numerator * (LCM / Denominator);
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unsigned RHSNumerator = RHS.Numerator * (LCM / RHS.Denominator);
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Numerator = LHSNumerator + RHSNumerator;
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Denominator = LCM;
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}
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return *this;
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}
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void computeProcResourceMasks(const MCSchedModel &SM,
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MutableArrayRef<uint64_t> Masks) {
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unsigned ProcResourceID = 0;
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assert(Masks.size() == SM.getNumProcResourceKinds() &&
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"Invalid number of elements");
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// Resource at index 0 is the 'InvalidUnit'. Set an invalid mask for it.
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Masks[0] = 0;
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// Create a unique bitmask for every processor resource unit.
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for (unsigned I = 1, E = SM.getNumProcResourceKinds(); I < E; ++I) {
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const MCProcResourceDesc &Desc = *SM.getProcResource(I);
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if (Desc.SubUnitsIdxBegin)
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continue;
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Masks[I] = 1ULL << ProcResourceID;
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ProcResourceID++;
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}
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// Create a unique bitmask for every processor resource group.
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for (unsigned I = 1, E = SM.getNumProcResourceKinds(); I < E; ++I) {
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const MCProcResourceDesc &Desc = *SM.getProcResource(I);
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if (!Desc.SubUnitsIdxBegin)
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continue;
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Masks[I] = 1ULL << ProcResourceID;
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for (unsigned U = 0; U < Desc.NumUnits; ++U) {
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uint64_t OtherMask = Masks[Desc.SubUnitsIdxBegin[U]];
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Masks[I] |= OtherMask;
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}
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ProcResourceID++;
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}
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}
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#ifndef NDEBUG
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void dumpProcResourceMasks(const MCSchedModel &SM, ArrayRef<uint64_t> Masks) {
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dbgs() << "\nProcessor resource masks:\n";
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for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
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const MCProcResourceDesc &Desc = *SM.getProcResource(I);
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dbgs() << '[' << format_decimal(I, 2) << "] " << " - "
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<< format_hex(Masks[I], 16) << " - " << Desc.Name << '\n';
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}
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}
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#endif
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double computeBlockRThroughput(const MCSchedModel &SM, unsigned DispatchWidth,
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unsigned NumMicroOps,
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ArrayRef<unsigned> ProcResourceUsage) {
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// The block throughput is bounded from above by the hardware dispatch
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// throughput. That is because the DispatchWidth is an upper bound on the
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// number of opcodes that can be part of a single dispatch group.
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double Max = static_cast<double>(NumMicroOps) / DispatchWidth;
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// The block throughput is also limited by the amount of hardware parallelism.
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// The number of available resource units affects the resource pressure
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// distribution, as well as how many blocks can be executed every cycle.
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for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
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unsigned ReleaseAtCycles = ProcResourceUsage[I];
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if (!ReleaseAtCycles)
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continue;
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const MCProcResourceDesc &MCDesc = *SM.getProcResource(I);
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double Throughput = static_cast<double>(ReleaseAtCycles) / MCDesc.NumUnits;
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Max = std::max(Max, Throughput);
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}
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// The block reciprocal throughput is computed as the MAX of:
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// - (NumMicroOps / DispatchWidth)
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// - (NumUnits / ReleaseAtCycles) for every consumed processor resource.
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return Max;
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}
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} // namespace mca
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} // namespace llvm
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