0487db1f13
The existing way of managing clustered nodes was done through adding
weak edges between the neighbouring cluster nodes, which is a sort of
ordered queue. And this will be later recorded as `NextClusterPred` or
`NextClusterSucc` in `ScheduleDAGMI`.
But actually the instruction may be picked not in the exact order of the
queue. For example, we have a queue of cluster nodes A B C. But during
scheduling, node B might be picked first, then it will be very likely
that we only cluster B and C for Top-Down scheduling (leaving A alone).
Another issue is:
```
if (!ReorderWhileClustering && SUa->NodeNum > SUb->NodeNum)
std::swap(SUa, SUb);
if (!DAG->addEdge(SUb, SDep(SUa, SDep::Cluster)))
```
may break the cluster queue.
For example, we want to cluster nodes (order as in `MemOpRecords`): 1 3
2. 1(SUa) will be pred of 3(SUb) normally. But when it comes to (3, 2),
As 3(SUa) > 2(SUb), we would reorder the two nodes, which makes 2 be
pred of 3. This makes both 1 and 2 become preds of 3, but there is no
edge between 1 and 2. Thus we get a broken cluster chain.
To fix both issues, we introduce an unordered set in the change. This
could help improve clustering in some hard case.
One key reason the change causes so many test check changes is: As the
cluster candidates are not ordered now, the candidates might be picked
in different order from before.
The most affected targets are: AMDGPU, AArch64, RISCV.
For RISCV, it seems to me most are just minor instruction reorder, don't
see obvious regression.
For AArch64, there were some combining of ldr into ldp being affected.
With two cases being regressed and two being improved. This has more
deeper reason that machine scheduler cannot cluster them well both
before and after the change, and the load combine algorithm later is
also not smart enough.
For AMDGPU, some cases have more v_dual instructions used while some are
regressed. It seems less critical. Seems like test `v_vselect_v32bf16`
gets more buffer_load being claused.
770 lines
26 KiB
LLVM
770 lines
26 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-none-linux-gnu -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD
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; RUN: llc -mtriple=aarch64-none-linux-gnu -o - -global-isel %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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;; Check that the llvm aarch64 backend can handle arrays of
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;; structs and vice versa when passed from IR.
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;; (this layering is something clang would normally simplify)
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;;
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;; Some of these examples are not ABI compliant and they're not
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;; meant to be. For instance according to the ABI an aggregate
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;; with more than 4 members must go in memory. This restriction
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;; is applied earlier in the compilation process so here we do
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;; see 8 member types in registers.
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;;
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;; When we have more than 8 members we simply run out of registers
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;; and that's what produces the 8 limit here.
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;; Plain arrays
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define [ 0 x double ] @array_0() {
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; CHECK-LABEL: array_0:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ret
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ret [ 0 x double ] zeroinitializer
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}
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define [ 1 x double ] @array_1() {
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; CHECK-LABEL: array_1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: ret
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ret [ 1 x double ] zeroinitializer
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}
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define [ 8 x double ] @array_8() {
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; CHECK-LABEL: array_8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: movi d2, #0000000000000000
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; CHECK-NEXT: movi d3, #0000000000000000
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; CHECK-NEXT: movi d4, #0000000000000000
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; CHECK-NEXT: movi d5, #0000000000000000
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; CHECK-NEXT: movi d6, #0000000000000000
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; CHECK-NEXT: movi d7, #0000000000000000
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; CHECK-NEXT: ret
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ret [ 8 x double ] zeroinitializer
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}
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;; > 8 items goes on the stack
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define [ 9 x double ] @array_9() {
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; CHECK-SD-LABEL: array_9:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
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; CHECK-SD-NEXT: str xzr, [x8, #64]
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; CHECK-SD-NEXT: stp q0, q0, [x8]
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; CHECK-SD-NEXT: stp q0, q0, [x8, #32]
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: array_9:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: stp xzr, xzr, [x8]
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; CHECK-GI-NEXT: stp xzr, xzr, [x8, #16]
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; CHECK-GI-NEXT: stp xzr, xzr, [x8, #32]
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; CHECK-GI-NEXT: stp xzr, xzr, [x8, #48]
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; CHECK-GI-NEXT: str xzr, [x8, #64]
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; CHECK-GI-NEXT: ret
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ret [ 9 x double ] zeroinitializer
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}
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;; Won't use any registers, just checking for assumptions.
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%T_STRUCT_0M = type { }
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define %T_STRUCT_0M @struct_zero_fields() {
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; CHECK-LABEL: struct_zero_fields:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ret
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ret %T_STRUCT_0M zeroinitializer
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}
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define [ 1 x %T_STRUCT_0M ] @array_of_struct_zero_fields() {
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; CHECK-LABEL: array_of_struct_zero_fields:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ret
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ret [ 1 x %T_STRUCT_0M ] zeroinitializer
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}
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define [ 2 x %T_STRUCT_0M ] @array_of_struct_zero_fields_in_struct() {
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; CHECK-LABEL: array_of_struct_zero_fields_in_struct:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ret
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ret [ 2 x %T_STRUCT_0M ] zeroinitializer
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}
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%T_STRUCT_1M = type { i32 }
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define %T_STRUCT_1M @struct_one_field() {
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; CHECK-LABEL: struct_one_field:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: ret
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ret %T_STRUCT_1M zeroinitializer
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}
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define [ 1 x %T_STRUCT_1M ] @array_of_struct_one_field() {
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; CHECK-LABEL: array_of_struct_one_field:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: ret
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ret [ 1 x %T_STRUCT_1M ] zeroinitializer
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}
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;; This one will be a reg block
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define [ 2 x %T_STRUCT_1M ] @array_of_struct_one_field_2() {
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; CHECK-LABEL: array_of_struct_one_field_2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: mov w1, wzr
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; CHECK-NEXT: ret
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ret [ 2 x %T_STRUCT_1M ] zeroinitializer
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}
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;; Different types for each field, will not be put in a reg block
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%T_STRUCT_DIFFM = type { double, i32 }
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define %T_STRUCT_DIFFM @struct_different_field_types() {
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; CHECK-LABEL: struct_different_field_types:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: ret
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ret %T_STRUCT_DIFFM zeroinitializer
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}
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define [ 1 x %T_STRUCT_DIFFM ] @array_of_struct_different_field_types() {
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; CHECK-LABEL: array_of_struct_different_field_types:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: ret
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ret [ 1 x %T_STRUCT_DIFFM ] zeroinitializer
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}
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define [ 2 x %T_STRUCT_DIFFM ] @array_of_struct_different_field_types_2() {
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; CHECK-LABEL: array_of_struct_different_field_types_2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: mov w1, wzr
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; CHECK-NEXT: ret
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ret [ 2 x %T_STRUCT_DIFFM ] zeroinitializer
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}
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;; Each field is the same type, can be put in a reg block
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%T_STRUCT_SAMEM = type { double, double }
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;; Here isn't a block as such, we just allocate two consecutive registers
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define %T_STRUCT_SAMEM @struct_same_field_types() {
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; CHECK-LABEL: struct_same_field_types:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: ret
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ret %T_STRUCT_SAMEM zeroinitializer
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}
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define [ 1 x %T_STRUCT_SAMEM ] @array_of_struct_same_field_types() {
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; CHECK-LABEL: array_of_struct_same_field_types:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: ret
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ret [ 1 x %T_STRUCT_SAMEM ] zeroinitializer
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}
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define [ 2 x %T_STRUCT_SAMEM ] @array_of_struct_same_field_types_2() {
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; CHECK-LABEL: array_of_struct_same_field_types_2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: movi d2, #0000000000000000
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; CHECK-NEXT: movi d3, #0000000000000000
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; CHECK-NEXT: ret
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ret [ 2 x %T_STRUCT_SAMEM ] zeroinitializer
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}
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;; Same field type but integer this time. Put into x registers instead.
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%T_STRUCT_SAMEM_INT = type { i64, i64 }
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define %T_STRUCT_SAMEM_INT @struct_same_field_types_int() {
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; CHECK-LABEL: struct_same_field_types_int:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov x0, xzr
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; CHECK-NEXT: mov x1, xzr
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; CHECK-NEXT: ret
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ret %T_STRUCT_SAMEM_INT zeroinitializer
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}
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define [ 1 x %T_STRUCT_SAMEM_INT ] @array_of_struct_same_field_types_int() {
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; CHECK-LABEL: array_of_struct_same_field_types_int:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov x0, xzr
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; CHECK-NEXT: mov x1, xzr
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; CHECK-NEXT: ret
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ret [ 1 x %T_STRUCT_SAMEM_INT ] zeroinitializer
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}
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define [ 2 x %T_STRUCT_SAMEM_INT ] @array_of_struct_same_field_types_int_2() {
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; CHECK-LABEL: array_of_struct_same_field_types_int_2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov x0, xzr
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; CHECK-NEXT: mov x1, xzr
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; CHECK-NEXT: mov x2, xzr
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; CHECK-NEXT: mov x3, xzr
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; CHECK-NEXT: ret
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ret [ 2 x %T_STRUCT_SAMEM_INT ] zeroinitializer
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}
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;; An aggregate of more than 8 items must go in memory.
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;; 4x2 struct fields = 8 items so it goes in a block.
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define [ 4 x %T_STRUCT_SAMEM ] @array_of_struct_8_fields() {
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; CHECK-LABEL: array_of_struct_8_fields:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: movi d2, #0000000000000000
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; CHECK-NEXT: movi d3, #0000000000000000
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; CHECK-NEXT: movi d4, #0000000000000000
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; CHECK-NEXT: movi d5, #0000000000000000
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; CHECK-NEXT: movi d6, #0000000000000000
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; CHECK-NEXT: movi d7, #0000000000000000
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; CHECK-NEXT: ret
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ret [ 4 x %T_STRUCT_SAMEM ] zeroinitializer
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}
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;; 5x2 fields = 10 so it is returned in memory.
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define [ 5 x %T_STRUCT_SAMEM ] @array_of_struct_in_memory() {
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; CHECK-SD-LABEL: array_of_struct_in_memory:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
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; CHECK-SD-NEXT: stp q0, q0, [x8, #16]
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; CHECK-SD-NEXT: stp q0, q0, [x8, #48]
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; CHECK-SD-NEXT: str q0, [x8]
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: array_of_struct_in_memory:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: stp xzr, xzr, [x8]
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; CHECK-GI-NEXT: stp xzr, xzr, [x8, #16]
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; CHECK-GI-NEXT: stp xzr, xzr, [x8, #32]
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; CHECK-GI-NEXT: stp xzr, xzr, [x8, #48]
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; CHECK-GI-NEXT: stp xzr, xzr, [x8, #64]
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; CHECK-GI-NEXT: ret
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ret [ 5 x %T_STRUCT_SAMEM ] zeroinitializer
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}
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;; A struct whose field is an array.
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%T_STRUCT_ARRAYM = type { [ 2 x double ]};
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define %T_STRUCT_ARRAYM @struct_array_field() {
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; CHECK-LABEL: struct_array_field:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: ret
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ret %T_STRUCT_ARRAYM zeroinitializer
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}
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define [ 1 x %T_STRUCT_ARRAYM ] @array_of_struct_array_field() {
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; CHECK-LABEL: array_of_struct_array_field:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: ret
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ret [ 1 x %T_STRUCT_ARRAYM ] zeroinitializer
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}
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define [ 2 x %T_STRUCT_ARRAYM ] @array_of_struct_array_field_2() {
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; CHECK-LABEL: array_of_struct_array_field_2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: movi d2, #0000000000000000
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; CHECK-NEXT: movi d3, #0000000000000000
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; CHECK-NEXT: ret
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ret [ 2 x %T_STRUCT_ARRAYM ] zeroinitializer
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}
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;; All non-aggregate fields must have the same type, all through the
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;; overall aggreagate. This is false here because of the i32.
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%T_NESTED_STRUCT_DIFFM = type {
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[ 1 x { { double, double } } ],
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[ 1 x { { double, i32 } } ]
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};
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define %T_NESTED_STRUCT_DIFFM @struct_nested_different_field_types() {
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; CHECK-LABEL: struct_nested_different_field_types:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: movi d2, #0000000000000000
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; CHECK-NEXT: ret
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ret %T_NESTED_STRUCT_DIFFM zeroinitializer
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}
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define [ 1 x %T_NESTED_STRUCT_DIFFM ] @array_of_struct_nested_different_field_types() {
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; CHECK-LABEL: array_of_struct_nested_different_field_types:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: movi d2, #0000000000000000
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; CHECK-NEXT: ret
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ret [ 1 x %T_NESTED_STRUCT_DIFFM ] zeroinitializer
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}
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define [ 2 x %T_NESTED_STRUCT_DIFFM ] @array_of_struct_nested_different_field_types_2() {
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; CHECK-LABEL: array_of_struct_nested_different_field_types_2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: movi d2, #0000000000000000
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; CHECK-NEXT: movi d3, #0000000000000000
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; CHECK-NEXT: mov w1, wzr
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; CHECK-NEXT: movi d4, #0000000000000000
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; CHECK-NEXT: movi d5, #0000000000000000
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; CHECK-NEXT: ret
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ret [ 2 x %T_NESTED_STRUCT_DIFFM ] zeroinitializer
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}
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;; All fields here are the same type, more nesting to stress the recursive walk.
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%T_NESTED_STRUCT_SAMEM = type {
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{ { double} },
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{ [ 2 x { double, double } ] }
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};
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define %T_NESTED_STRUCT_SAMEM @struct_nested_same_field_types() {
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; CHECK-LABEL: struct_nested_same_field_types:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: movi d2, #0000000000000000
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; CHECK-NEXT: movi d3, #0000000000000000
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; CHECK-NEXT: movi d4, #0000000000000000
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; CHECK-NEXT: ret
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ret %T_NESTED_STRUCT_SAMEM zeroinitializer
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}
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define [ 1 x %T_NESTED_STRUCT_SAMEM ] @array_of_struct_nested_same_field_types() {
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; CHECK-LABEL: array_of_struct_nested_same_field_types:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: movi d2, #0000000000000000
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; CHECK-NEXT: movi d3, #0000000000000000
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; CHECK-NEXT: movi d4, #0000000000000000
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; CHECK-NEXT: ret
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ret [ 1 x %T_NESTED_STRUCT_SAMEM ] zeroinitializer
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}
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;; 2 x (1 + (2 x 2)) = 10 so this is returned in memory
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define [ 2 x %T_NESTED_STRUCT_SAMEM ] @array_of_struct_nested_same_field_types_2() {
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; CHECK-SD-LABEL: array_of_struct_nested_same_field_types_2:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
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; CHECK-SD-NEXT: stp q0, q0, [x8, #16]
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; CHECK-SD-NEXT: stp q0, q0, [x8, #48]
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; CHECK-SD-NEXT: str q0, [x8]
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: array_of_struct_nested_same_field_types_2:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: stp xzr, xzr, [x8]
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; CHECK-GI-NEXT: stp xzr, xzr, [x8, #16]
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; CHECK-GI-NEXT: stp xzr, xzr, [x8, #32]
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; CHECK-GI-NEXT: stp xzr, xzr, [x8, #48]
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; CHECK-GI-NEXT: stp xzr, xzr, [x8, #64]
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; CHECK-GI-NEXT: ret
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ret [ 2 x %T_NESTED_STRUCT_SAMEM ] zeroinitializer
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}
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;; Check combinations of call, return and argument passing
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%T_IN_BLOCK = type [ 2 x { double, { double, double } } ]
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|
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define %T_IN_BLOCK @return_in_block() {
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|
; CHECK-LABEL: return_in_block:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: movi d2, #0000000000000000
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; CHECK-NEXT: movi d3, #0000000000000000
|
|
; CHECK-NEXT: movi d4, #0000000000000000
|
|
; CHECK-NEXT: movi d5, #0000000000000000
|
|
; CHECK-NEXT: ret
|
|
ret %T_IN_BLOCK zeroinitializer
|
|
}
|
|
|
|
@in_block_store = dso_local global %T_IN_BLOCK zeroinitializer, align 8
|
|
|
|
define void @caller_in_block() {
|
|
; CHECK-SD-LABEL: caller_in_block:
|
|
; CHECK-SD: // %bb.0:
|
|
; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
|
; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-SD-NEXT: .cfi_offset w30, -16
|
|
; CHECK-SD-NEXT: bl return_in_block
|
|
; CHECK-SD-NEXT: adrp x8, in_block_store
|
|
; CHECK-SD-NEXT: add x8, x8, :lo12:in_block_store
|
|
; CHECK-SD-NEXT: stp d0, d1, [x8]
|
|
; CHECK-SD-NEXT: stp d2, d3, [x8, #16]
|
|
; CHECK-SD-NEXT: stp d4, d5, [x8, #32]
|
|
; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: caller_in_block:
|
|
; CHECK-GI: // %bb.0:
|
|
; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
|
; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-GI-NEXT: .cfi_offset w30, -16
|
|
; CHECK-GI-NEXT: bl return_in_block
|
|
; CHECK-GI-NEXT: adrp x8, in_block_store
|
|
; CHECK-GI-NEXT: str d0, [x8, :lo12:in_block_store]
|
|
; CHECK-GI-NEXT: adrp x8, in_block_store
|
|
; CHECK-GI-NEXT: add x8, x8, :lo12:in_block_store
|
|
; CHECK-GI-NEXT: stp d1, d2, [x8, #8]
|
|
; CHECK-GI-NEXT: stp d3, d4, [x8, #24]
|
|
; CHECK-GI-NEXT: str d5, [x8, #40]
|
|
; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
|
; CHECK-GI-NEXT: ret
|
|
%1 = call %T_IN_BLOCK @return_in_block()
|
|
store %T_IN_BLOCK %1, ptr @in_block_store
|
|
ret void
|
|
}
|
|
|
|
define void @callee_in_block(%T_IN_BLOCK %a) {
|
|
; CHECK-SD-LABEL: callee_in_block:
|
|
; CHECK-SD: // %bb.0:
|
|
; CHECK-SD-NEXT: adrp x8, in_block_store
|
|
; CHECK-SD-NEXT: add x8, x8, :lo12:in_block_store
|
|
; CHECK-SD-NEXT: stp d4, d5, [x8, #32]
|
|
; CHECK-SD-NEXT: stp d2, d3, [x8, #16]
|
|
; CHECK-SD-NEXT: stp d0, d1, [x8]
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: callee_in_block:
|
|
; CHECK-GI: // %bb.0:
|
|
; CHECK-GI-NEXT: adrp x8, in_block_store
|
|
; CHECK-GI-NEXT: str d0, [x8, :lo12:in_block_store]
|
|
; CHECK-GI-NEXT: adrp x8, in_block_store
|
|
; CHECK-GI-NEXT: add x8, x8, :lo12:in_block_store
|
|
; CHECK-GI-NEXT: stp d1, d2, [x8, #8]
|
|
; CHECK-GI-NEXT: stp d3, d4, [x8, #24]
|
|
; CHECK-GI-NEXT: str d5, [x8, #40]
|
|
; CHECK-GI-NEXT: ret
|
|
store %T_IN_BLOCK %a, ptr @in_block_store
|
|
ret void
|
|
}
|
|
|
|
define void @argument_in_block() {
|
|
; CHECK-SD-LABEL: argument_in_block:
|
|
; CHECK-SD: // %bb.0:
|
|
; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
|
; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-SD-NEXT: .cfi_offset w30, -16
|
|
; CHECK-SD-NEXT: adrp x8, in_block_store
|
|
; CHECK-SD-NEXT: add x8, x8, :lo12:in_block_store
|
|
; CHECK-SD-NEXT: ldp d4, d5, [x8, #32]
|
|
; CHECK-SD-NEXT: ldp d2, d3, [x8, #16]
|
|
; CHECK-SD-NEXT: ldp d0, d1, [x8]
|
|
; CHECK-SD-NEXT: bl callee_in_block
|
|
; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: argument_in_block:
|
|
; CHECK-GI: // %bb.0:
|
|
; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
|
; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-GI-NEXT: .cfi_offset w30, -16
|
|
; CHECK-GI-NEXT: adrp x9, in_block_store
|
|
; CHECK-GI-NEXT: add x9, x9, :lo12:in_block_store
|
|
; CHECK-GI-NEXT: adrp x8, in_block_store
|
|
; CHECK-GI-NEXT: ldp d1, d2, [x9, #8]
|
|
; CHECK-GI-NEXT: ldr d0, [x8, :lo12:in_block_store]
|
|
; CHECK-GI-NEXT: ldp d3, d4, [x9, #24]
|
|
; CHECK-GI-NEXT: ldr d5, [x9, #40]
|
|
; CHECK-GI-NEXT: bl callee_in_block
|
|
; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
|
; CHECK-GI-NEXT: ret
|
|
%1 = load %T_IN_BLOCK, ptr @in_block_store
|
|
call void @callee_in_block(%T_IN_BLOCK %1)
|
|
ret void
|
|
}
|
|
|
|
%T_IN_MEMORY = type [ 3 x { double, { double, double } } ]
|
|
|
|
define %T_IN_MEMORY @return_in_memory() {
|
|
; CHECK-SD-LABEL: return_in_memory:
|
|
; CHECK-SD: // %bb.0:
|
|
; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
|
|
; CHECK-SD-NEXT: str xzr, [x8, #64]
|
|
; CHECK-SD-NEXT: stp q0, q0, [x8]
|
|
; CHECK-SD-NEXT: stp q0, q0, [x8, #32]
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: return_in_memory:
|
|
; CHECK-GI: // %bb.0:
|
|
; CHECK-GI-NEXT: stp xzr, xzr, [x8]
|
|
; CHECK-GI-NEXT: stp xzr, xzr, [x8, #16]
|
|
; CHECK-GI-NEXT: stp xzr, xzr, [x8, #32]
|
|
; CHECK-GI-NEXT: stp xzr, xzr, [x8, #48]
|
|
; CHECK-GI-NEXT: str xzr, [x8, #64]
|
|
; CHECK-GI-NEXT: ret
|
|
ret %T_IN_MEMORY zeroinitializer
|
|
}
|
|
|
|
@in_memory_store = dso_local global %T_IN_MEMORY zeroinitializer, align 8
|
|
|
|
define void @caller_in_memory() {
|
|
; CHECK-SD-LABEL: caller_in_memory:
|
|
; CHECK-SD: // %bb.0:
|
|
; CHECK-SD-NEXT: sub sp, sp, #96
|
|
; CHECK-SD-NEXT: str x30, [sp, #80] // 8-byte Folded Spill
|
|
; CHECK-SD-NEXT: .cfi_def_cfa_offset 96
|
|
; CHECK-SD-NEXT: .cfi_offset w30, -16
|
|
; CHECK-SD-NEXT: add x8, sp, #8
|
|
; CHECK-SD-NEXT: bl return_in_memory
|
|
; CHECK-SD-NEXT: ldur q0, [sp, #24]
|
|
; CHECK-SD-NEXT: ldur q1, [sp, #8]
|
|
; CHECK-SD-NEXT: adrp x8, in_memory_store
|
|
; CHECK-SD-NEXT: add x8, x8, :lo12:in_memory_store
|
|
; CHECK-SD-NEXT: ldr d2, [sp, #72]
|
|
; CHECK-SD-NEXT: ldur q3, [sp, #56]
|
|
; CHECK-SD-NEXT: ldur q4, [sp, #40]
|
|
; CHECK-SD-NEXT: ldr x30, [sp, #80] // 8-byte Folded Reload
|
|
; CHECK-SD-NEXT: stp q1, q0, [x8]
|
|
; CHECK-SD-NEXT: str d2, [x8, #64]
|
|
; CHECK-SD-NEXT: stp q4, q3, [x8, #32]
|
|
; CHECK-SD-NEXT: add sp, sp, #96
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: caller_in_memory:
|
|
; CHECK-GI: // %bb.0:
|
|
; CHECK-GI-NEXT: sub sp, sp, #96
|
|
; CHECK-GI-NEXT: str x30, [sp, #80] // 8-byte Folded Spill
|
|
; CHECK-GI-NEXT: .cfi_def_cfa_offset 96
|
|
; CHECK-GI-NEXT: .cfi_offset w30, -16
|
|
; CHECK-GI-NEXT: add x8, sp, #8
|
|
; CHECK-GI-NEXT: bl return_in_memory
|
|
; CHECK-GI-NEXT: ldp x8, x9, [sp, #8]
|
|
; CHECK-GI-NEXT: adrp x10, in_memory_store
|
|
; CHECK-GI-NEXT: ldp x11, x12, [sp, #24]
|
|
; CHECK-GI-NEXT: ldp x13, x14, [sp, #40]
|
|
; CHECK-GI-NEXT: ldp x15, x16, [sp, #56]
|
|
; CHECK-GI-NEXT: ldp x17, x30, [sp, #72] // 8-byte Folded Reload
|
|
; CHECK-GI-NEXT: str x8, [x10, :lo12:in_memory_store]
|
|
; CHECK-GI-NEXT: adrp x8, in_memory_store
|
|
; CHECK-GI-NEXT: add x8, x8, :lo12:in_memory_store
|
|
; CHECK-GI-NEXT: stp x9, x11, [x8, #8]
|
|
; CHECK-GI-NEXT: stp x12, x13, [x8, #24]
|
|
; CHECK-GI-NEXT: stp x14, x15, [x8, #40]
|
|
; CHECK-GI-NEXT: stp x16, x17, [x8, #56]
|
|
; CHECK-GI-NEXT: add sp, sp, #96
|
|
; CHECK-GI-NEXT: ret
|
|
%1 = call %T_IN_MEMORY @return_in_memory()
|
|
store %T_IN_MEMORY %1, ptr @in_memory_store
|
|
ret void
|
|
}
|
|
|
|
define void @callee_in_memory(%T_IN_MEMORY %a) {
|
|
; CHECK-SD-LABEL: callee_in_memory:
|
|
; CHECK-SD: // %bb.0:
|
|
; CHECK-SD-NEXT: ldp q1, q2, [sp, #32]
|
|
; CHECK-SD-NEXT: adrp x8, in_memory_store
|
|
; CHECK-SD-NEXT: add x8, x8, :lo12:in_memory_store
|
|
; CHECK-SD-NEXT: ldr d0, [sp, #64]
|
|
; CHECK-SD-NEXT: str d0, [x8, #64]
|
|
; CHECK-SD-NEXT: str q2, [x8, #48]
|
|
; CHECK-SD-NEXT: ldp q2, q0, [sp]
|
|
; CHECK-SD-NEXT: stp q0, q1, [x8, #16]
|
|
; CHECK-SD-NEXT: str q2, [x8]
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: callee_in_memory:
|
|
; CHECK-GI: // %bb.0:
|
|
; CHECK-GI-NEXT: ldp x8, x9, [sp]
|
|
; CHECK-GI-NEXT: adrp x10, in_memory_store
|
|
; CHECK-GI-NEXT: ldp x11, x12, [sp, #16]
|
|
; CHECK-GI-NEXT: str x8, [x10, :lo12:in_memory_store]
|
|
; CHECK-GI-NEXT: adrp x8, in_memory_store
|
|
; CHECK-GI-NEXT: add x8, x8, :lo12:in_memory_store
|
|
; CHECK-GI-NEXT: stp x9, x11, [x8, #8]
|
|
; CHECK-GI-NEXT: ldp x9, x10, [sp, #32]
|
|
; CHECK-GI-NEXT: stp x12, x9, [x8, #24]
|
|
; CHECK-GI-NEXT: ldp x9, x11, [sp, #48]
|
|
; CHECK-GI-NEXT: str x10, [x8, #40]
|
|
; CHECK-GI-NEXT: ldr x10, [sp, #64]
|
|
; CHECK-GI-NEXT: stp x9, x11, [x8, #48]
|
|
; CHECK-GI-NEXT: str x10, [x8, #64]
|
|
; CHECK-GI-NEXT: ret
|
|
store %T_IN_MEMORY %a, ptr @in_memory_store
|
|
ret void
|
|
}
|
|
|
|
define void @argument_in_memory() {
|
|
; CHECK-SD-LABEL: argument_in_memory:
|
|
; CHECK-SD: // %bb.0:
|
|
; CHECK-SD-NEXT: sub sp, sp, #96
|
|
; CHECK-SD-NEXT: str x30, [sp, #80] // 8-byte Folded Spill
|
|
; CHECK-SD-NEXT: .cfi_def_cfa_offset 96
|
|
; CHECK-SD-NEXT: .cfi_offset w30, -16
|
|
; CHECK-SD-NEXT: adrp x8, in_memory_store
|
|
; CHECK-SD-NEXT: add x8, x8, :lo12:in_memory_store
|
|
; CHECK-SD-NEXT: ldp q0, q1, [x8]
|
|
; CHECK-SD-NEXT: ldr d4, [x8, #64]
|
|
; CHECK-SD-NEXT: ldp q2, q3, [x8, #32]
|
|
; CHECK-SD-NEXT: str d4, [sp, #64]
|
|
; CHECK-SD-NEXT: stp q0, q1, [sp]
|
|
; CHECK-SD-NEXT: stp q2, q3, [sp, #32]
|
|
; CHECK-SD-NEXT: bl callee_in_memory
|
|
; CHECK-SD-NEXT: ldr x30, [sp, #80] // 8-byte Folded Reload
|
|
; CHECK-SD-NEXT: add sp, sp, #96
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: argument_in_memory:
|
|
; CHECK-GI: // %bb.0:
|
|
; CHECK-GI-NEXT: sub sp, sp, #96
|
|
; CHECK-GI-NEXT: str x30, [sp, #80] // 8-byte Folded Spill
|
|
; CHECK-GI-NEXT: .cfi_def_cfa_offset 96
|
|
; CHECK-GI-NEXT: .cfi_offset w30, -16
|
|
; CHECK-GI-NEXT: adrp x9, in_memory_store
|
|
; CHECK-GI-NEXT: add x9, x9, :lo12:in_memory_store
|
|
; CHECK-GI-NEXT: adrp x8, in_memory_store
|
|
; CHECK-GI-NEXT: ldp x10, x11, [x9, #8]
|
|
; CHECK-GI-NEXT: ldr x8, [x8, :lo12:in_memory_store]
|
|
; CHECK-GI-NEXT: ldp x12, x13, [x9, #24]
|
|
; CHECK-GI-NEXT: ldp x14, x15, [x9, #40]
|
|
; CHECK-GI-NEXT: ldp x16, x9, [x9, #56]
|
|
; CHECK-GI-NEXT: stp x8, x10, [sp]
|
|
; CHECK-GI-NEXT: stp x11, x12, [sp, #16]
|
|
; CHECK-GI-NEXT: stp x13, x14, [sp, #32]
|
|
; CHECK-GI-NEXT: stp x15, x16, [sp, #48]
|
|
; CHECK-GI-NEXT: str x9, [sp, #64]
|
|
; CHECK-GI-NEXT: bl callee_in_memory
|
|
; CHECK-GI-NEXT: ldr x30, [sp, #80] // 8-byte Folded Reload
|
|
; CHECK-GI-NEXT: add sp, sp, #96
|
|
; CHECK-GI-NEXT: ret
|
|
%1 = load %T_IN_MEMORY, ptr @in_memory_store
|
|
call void @callee_in_memory(%T_IN_MEMORY %1)
|
|
ret void
|
|
}
|
|
|
|
%T_NO_BLOCK = type [ 2 x { double, { i32 } } ]
|
|
|
|
define %T_NO_BLOCK @return_no_block() {
|
|
; CHECK-LABEL: return_no_block:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: movi d0, #0000000000000000
|
|
; CHECK-NEXT: movi d1, #0000000000000000
|
|
; CHECK-NEXT: mov w0, wzr
|
|
; CHECK-NEXT: mov w1, wzr
|
|
; CHECK-NEXT: ret
|
|
ret %T_NO_BLOCK zeroinitializer
|
|
}
|
|
|
|
@no_block_store = dso_local global %T_NO_BLOCK zeroinitializer, align 8
|
|
|
|
define void @caller_no_block() {
|
|
; CHECK-SD-LABEL: caller_no_block:
|
|
; CHECK-SD: // %bb.0:
|
|
; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
|
; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-SD-NEXT: .cfi_offset w30, -16
|
|
; CHECK-SD-NEXT: bl return_no_block
|
|
; CHECK-SD-NEXT: adrp x8, no_block_store
|
|
; CHECK-SD-NEXT: add x8, x8, :lo12:no_block_store
|
|
; CHECK-SD-NEXT: str d0, [x8]
|
|
; CHECK-SD-NEXT: str w0, [x8, #8]
|
|
; CHECK-SD-NEXT: str d1, [x8, #16]
|
|
; CHECK-SD-NEXT: str w1, [x8, #24]
|
|
; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: caller_no_block:
|
|
; CHECK-GI: // %bb.0:
|
|
; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
|
; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-GI-NEXT: .cfi_offset w30, -16
|
|
; CHECK-GI-NEXT: bl return_no_block
|
|
; CHECK-GI-NEXT: adrp x8, no_block_store
|
|
; CHECK-GI-NEXT: str d0, [x8, :lo12:no_block_store]
|
|
; CHECK-GI-NEXT: adrp x8, no_block_store
|
|
; CHECK-GI-NEXT: add x8, x8, :lo12:no_block_store
|
|
; CHECK-GI-NEXT: str w0, [x8, #8]
|
|
; CHECK-GI-NEXT: str d1, [x8, #16]
|
|
; CHECK-GI-NEXT: str w1, [x8, #24]
|
|
; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
|
; CHECK-GI-NEXT: ret
|
|
%1 = call %T_NO_BLOCK @return_no_block()
|
|
store %T_NO_BLOCK %1, ptr @no_block_store
|
|
ret void
|
|
}
|
|
|
|
define void @callee_no_block(%T_NO_BLOCK %a) {
|
|
; CHECK-SD-LABEL: callee_no_block:
|
|
; CHECK-SD: // %bb.0:
|
|
; CHECK-SD-NEXT: adrp x8, no_block_store
|
|
; CHECK-SD-NEXT: add x8, x8, :lo12:no_block_store
|
|
; CHECK-SD-NEXT: str w1, [x8, #24]
|
|
; CHECK-SD-NEXT: str d1, [x8, #16]
|
|
; CHECK-SD-NEXT: str w0, [x8, #8]
|
|
; CHECK-SD-NEXT: str d0, [x8]
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: callee_no_block:
|
|
; CHECK-GI: // %bb.0:
|
|
; CHECK-GI-NEXT: adrp x8, no_block_store
|
|
; CHECK-GI-NEXT: str d0, [x8, :lo12:no_block_store]
|
|
; CHECK-GI-NEXT: adrp x8, no_block_store
|
|
; CHECK-GI-NEXT: add x8, x8, :lo12:no_block_store
|
|
; CHECK-GI-NEXT: str w0, [x8, #8]
|
|
; CHECK-GI-NEXT: str d1, [x8, #16]
|
|
; CHECK-GI-NEXT: str w1, [x8, #24]
|
|
; CHECK-GI-NEXT: ret
|
|
store %T_NO_BLOCK %a, ptr @no_block_store
|
|
ret void
|
|
}
|
|
|
|
define void @argument_no_block() {
|
|
; CHECK-SD-LABEL: argument_no_block:
|
|
; CHECK-SD: // %bb.0:
|
|
; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
|
|
; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-SD-NEXT: .cfi_offset w30, -16
|
|
; CHECK-SD-NEXT: adrp x8, no_block_store
|
|
; CHECK-SD-NEXT: add x8, x8, :lo12:no_block_store
|
|
; CHECK-SD-NEXT: ldr w1, [x8, #24]
|
|
; CHECK-SD-NEXT: ldr d1, [x8, #16]
|
|
; CHECK-SD-NEXT: ldr w0, [x8, #8]
|
|
; CHECK-SD-NEXT: ldr d0, [x8]
|
|
; CHECK-SD-NEXT: bl callee_no_block
|
|
; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: argument_no_block:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
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|
; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
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; CHECK-GI-NEXT: .cfi_offset w30, -16
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|
; CHECK-GI-NEXT: adrp x8, no_block_store
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|
; CHECK-GI-NEXT: adrp x9, no_block_store
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|
; CHECK-GI-NEXT: add x9, x9, :lo12:no_block_store
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|
; CHECK-GI-NEXT: ldr d0, [x8, :lo12:no_block_store]
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|
; CHECK-GI-NEXT: ldr w0, [x9, #8]
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|
; CHECK-GI-NEXT: ldr d1, [x9, #16]
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|
; CHECK-GI-NEXT: ldr w1, [x9, #24]
|
|
; CHECK-GI-NEXT: bl callee_no_block
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|
; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
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|
; CHECK-GI-NEXT: ret
|
|
%1 = load %T_NO_BLOCK, ptr @no_block_store
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|
call void @callee_no_block(%T_NO_BLOCK %1)
|
|
ret void
|
|
}
|