2e6c01be0d
These two opcodes are used to be followed by a MVT operand, which is always one of i8/i16/i32/i64. We add instantiated `OPC_EmitInteger` and `OPC_EmitStringInteger` with i8/i16/i32/i64 so that we can reduce one byte. We reserve `OPC_EmitInteger` and `OPC_EmitStringInteger` in case that we may need them someday, though I haven't found one usage after this change. Overall this reduces the llc binary size with all in-tree targets by about 200K.
15 lines
592 B
TableGen
15 lines
592 B
TableGen
// RUN: llvm-tblgen -gen-dag-isel -I %p/../../include -I %p/Common %s | FileCheck %s
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include "reg-with-subregs-common.td"
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// CHECK-LABEL: OPC_CheckOpcode, TARGET_VAL(ISD::EXTRACT_SUBVECTOR),
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// CHECK: OPC_CheckChild1Integer, 0,
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// CHECK: OPC_EmitStringInteger32, sub0_sub1,
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def : Pat<(v2i32 (extract_subvector v32i32:$src, (i32 0))),
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(EXTRACT_SUBREG GPR_1024:$src, sub0_sub1)>;
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// CHECK: OPC_CheckChild1Integer, 30,
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// CHECK: OPC_EmitInteger32, 10|128,2/*266*/,
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def : Pat<(v2i32 (extract_subvector v32i32:$src, (i32 15))),
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(EXTRACT_SUBREG GPR_1024:$src, sub30_sub31)>;
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