6934ed51b3
This adds the analogous metadata to the nofpclass attribute to assert values are not a certain set of floating-point classes. This allows the same information to be expressed if a function argument is passed indirectly. This matches the bitmask encoding of nofpclass. I also think this should be allowed for stores to symmetrically handle sret, but leave that for later. Alternatively we could add a more expressive !fprange metadata, but that would be much more complex. It's useful to match the attribute, and more annotations can always be added. Fixes #133560
109 lines
4.9 KiB
LLVM
109 lines
4.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
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; RUN: opt < %s -passes=argpromotion -S | FileCheck %s
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declare void @use.i32(i32)
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declare void @use.p32(ptr)
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declare void @use.f32(float)
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define internal void @callee(ptr %p1, ptr %p2, ptr %p3, ptr %p4, ptr %p5, ptr %p6, ptr %p7, ptr %p8, ptr %p9, ptr %p10, ptr %p11) {
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; CHECK-LABEL: define {{[^@]+}}@callee
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; CHECK-SAME: (i32 [[P1_0_VAL:%.*]], i32 [[P2_0_VAL:%.*]], ptr [[P3_0_VAL:%.*]], ptr [[P4_0_VAL:%.*]], ptr [[P5_0_VAL:%.*]], ptr [[P6_0_VAL:%.*]], ptr [[P7_0_VAL:%.*]], ptr [[P8_0_VAL:%.*]], ptr [[P9_0_VAL:%.*]], ptr [[P10_0_VAL:%.*]], float [[P11_0_VAL:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ne ptr [[P4_0_VAL]], null
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; CHECK-NEXT: call void @llvm.assume(i1 [[TMP1]])
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; CHECK-NEXT: call void @use.i32(i32 [[P1_0_VAL]])
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; CHECK-NEXT: call void @use.i32(i32 [[P2_0_VAL]])
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; CHECK-NEXT: call void @use.p32(ptr [[P3_0_VAL]])
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; CHECK-NEXT: call void @use.p32(ptr [[P4_0_VAL]])
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; CHECK-NEXT: call void @use.p32(ptr [[P5_0_VAL]])
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; CHECK-NEXT: call void @use.p32(ptr [[P6_0_VAL]])
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; CHECK-NEXT: call void @use.p32(ptr [[P7_0_VAL]])
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; CHECK-NEXT: call void @use.p32(ptr [[P8_0_VAL]])
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; CHECK-NEXT: call void @use.p32(ptr [[P9_0_VAL]])
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; CHECK-NEXT: call void @use.p32(ptr [[P10_0_VAL]])
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; CHECK-NEXT: call void @use.f32(float [[P11_0_VAL]])
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; CHECK-NEXT: ret void
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;
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%v1 = load i32, ptr %p1, !range !0
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%v2 = load i32, ptr %p2, !range !0, !noundef !1
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%v3 = load ptr, ptr %p3, !nonnull !1
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%v4 = load ptr, ptr %p4, !nonnull !1, !noundef !1
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%v5 = load ptr, ptr %p5, !dereferenceable !2
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%v6 = load ptr, ptr %p6, !dereferenceable_or_null !2
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%v7 = load ptr, ptr %p7, !align !3
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%v8 = load ptr, ptr %p8, !align !3, !noundef !1
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%v9 = load ptr, ptr %p9, !noundef !1
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%v10 = load ptr, ptr %p10, !nontemporal !4
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%v11 = load float, ptr %p11, !nofpclass !{i32 3}
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call void @use.i32(i32 %v1)
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call void @use.i32(i32 %v2)
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call void @use.p32(ptr %v3)
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call void @use.p32(ptr %v4)
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call void @use.p32(ptr %v5)
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call void @use.p32(ptr %v6)
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call void @use.p32(ptr %v7)
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call void @use.p32(ptr %v8)
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call void @use.p32(ptr %v9)
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call void @use.p32(ptr %v10)
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call void @use.f32(float %v11)
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ret void
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}
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define void @caller(ptr %p1, ptr %p2, ptr %p3, ptr %p4, ptr %p5, ptr %p6, ptr %p7, ptr %p8, ptr %p9, ptr %p10, ptr %p11) {
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; CHECK-LABEL: define {{[^@]+}}@caller
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; CHECK-SAME: (ptr [[P1:%.*]], ptr [[P2:%.*]], ptr [[P3:%.*]], ptr [[P4:%.*]], ptr [[P5:%.*]], ptr [[P6:%.*]], ptr [[P7:%.*]], ptr [[P8:%.*]], ptr [[P9:%.*]], ptr [[P10:%.*]], ptr [[P11:%.*]]) {
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; CHECK-NEXT: [[P1_VAL:%.*]] = load i32, ptr [[P1]], align 4
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; CHECK-NEXT: [[P2_VAL:%.*]] = load i32, ptr [[P2]], align 4, !range [[RNG0:![0-9]+]], !noundef [[META1:![0-9]+]]
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; CHECK-NEXT: [[P3_VAL:%.*]] = load ptr, ptr [[P3]], align 8
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; CHECK-NEXT: [[P4_VAL:%.*]] = load ptr, ptr [[P4]], align 8, !nonnull [[META1]], !noundef [[META1]]
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; CHECK-NEXT: [[P5_VAL:%.*]] = load ptr, ptr [[P5]], align 8, !dereferenceable [[META2:![0-9]+]]
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; CHECK-NEXT: [[P6_VAL:%.*]] = load ptr, ptr [[P6]], align 8, !dereferenceable_or_null [[META2]]
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; CHECK-NEXT: [[P7_VAL:%.*]] = load ptr, ptr [[P7]], align 8
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; CHECK-NEXT: [[P8_VAL:%.*]] = load ptr, ptr [[P8]], align 8, !align [[META3:![0-9]+]], !noundef [[META1]]
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; CHECK-NEXT: [[P9_VAL:%.*]] = load ptr, ptr [[P9]], align 8, !noundef [[META1]]
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; CHECK-NEXT: [[P10_VAL:%.*]] = load ptr, ptr [[P10]], align 8, !nontemporal [[META4:![0-9]+]]
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; CHECK-NEXT: [[P11_VAL:%.*]] = load float, ptr [[P11]], align 4
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; CHECK-NEXT: call void @callee(i32 [[P1_VAL]], i32 [[P2_VAL]], ptr [[P3_VAL]], ptr [[P4_VAL]], ptr [[P5_VAL]], ptr [[P6_VAL]], ptr [[P7_VAL]], ptr [[P8_VAL]], ptr [[P9_VAL]], ptr [[P10_VAL]], float [[P11_VAL]])
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; CHECK-NEXT: ret void
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;
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call void @callee(ptr %p1, ptr %p2, ptr %p3, ptr %p4, ptr %p5, ptr %p6, ptr %p7, ptr %p8, ptr %p9, ptr %p10, ptr %p11)
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ret void
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}
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define internal ptr @callee_conditional(i1 %c, ptr dereferenceable(8) align 8 %p) {
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; CHECK-LABEL: define {{[^@]+}}@callee_conditional
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; CHECK-SAME: (i1 [[C:%.*]], ptr [[P_0_VAL:%.*]]) {
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; CHECK-NEXT: br i1 [[C]], label [[IF:%.*]], label [[ELSE:%.*]]
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; CHECK: if:
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ne ptr [[P_0_VAL]], null
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; CHECK-NEXT: call void @llvm.assume(i1 [[TMP1]])
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; CHECK-NEXT: ret ptr [[P_0_VAL]]
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; CHECK: else:
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; CHECK-NEXT: ret ptr null
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;
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br i1 %c, label %if, label %else
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if:
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%v = load ptr, ptr %p, !nonnull !1, !noundef !1
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ret ptr %v
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else:
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ret ptr null
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}
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define void @caller_conditional(i1 %c, ptr %p) {
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; CHECK-LABEL: define {{[^@]+}}@caller_conditional
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; CHECK-SAME: (i1 [[C:%.*]], ptr [[P:%.*]]) {
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; CHECK-NEXT: [[P_VAL:%.*]] = load ptr, ptr [[P]], align 8
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; CHECK-NEXT: [[TMP1:%.*]] = call ptr @callee_conditional(i1 [[C]], ptr [[P_VAL]])
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; CHECK-NEXT: ret void
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;
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call ptr @callee_conditional(i1 %c, ptr %p)
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ret void
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}
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!0 = !{i32 0, i32 4}
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!1 = !{}
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!2 = !{i64 8}
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!3 = !{i64 4}
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!4 = !{i32 1}
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