128 lines
6.1 KiB
LLVM
128 lines
6.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S -passes=loop-fusion -loop-fusion-peel-max-count=3 < %s | FileCheck %s
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; Tests if we are able to fuse two guarded loops which have constant but
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; different trip counts. The first two iterations of the first loop should be
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; peeled off, and then the loops should be fused together.
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@B = common global [1024 x i32] zeroinitializer, align 16
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define void @main(ptr noalias %A) {
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; CHECK-LABEL: define void @main(
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; CHECK-SAME: ptr noalias [[A:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i64 0, 45
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; CHECK-NEXT: [[CMP31:%.*]] = icmp slt i64 2, 45
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; CHECK-NEXT: br i1 [[CMP4]], label %[[FOR_FIRST_ENTRY:.*]], label %[[FOR_END:.*]]
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; CHECK: [[FOR_FIRST_ENTRY]]:
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; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_BEGIN:.*]]
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; CHECK: [[FOR_FIRST_PEEL_BEGIN]]:
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; CHECK-NEXT: br label %[[FOR_FIRST_PEEL:.*]]
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; CHECK: [[FOR_FIRST_PEEL]]:
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; CHECK-NEXT: [[SUB_PEEL:%.*]] = sub nsw i64 0, 3
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; CHECK-NEXT: [[ADD_PEEL:%.*]] = add nsw i64 0, 3
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; CHECK-NEXT: [[MUL_PEEL:%.*]] = mul nsw i64 [[SUB_PEEL]], [[ADD_PEEL]]
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; CHECK-NEXT: [[REM_PEEL:%.*]] = srem i64 [[MUL_PEEL]], 0
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; CHECK-NEXT: [[CONV_PEEL:%.*]] = trunc i64 [[REM_PEEL]] to i32
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; CHECK-NEXT: [[ARRAYIDX_PEEL:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 0
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; CHECK-NEXT: store i32 [[CONV_PEEL]], ptr [[ARRAYIDX_PEEL]], align 4
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; CHECK-NEXT: [[INC_PEEL:%.*]] = add nsw i64 0, 1
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; CHECK-NEXT: [[CMP_PEEL:%.*]] = icmp slt i64 [[INC_PEEL]], 45
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; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_NEXT:.*]]
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; CHECK: [[FOR_FIRST_PEEL_NEXT]]:
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; CHECK-NEXT: br label %[[FOR_FIRST_PEEL2:.*]]
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; CHECK: [[FOR_FIRST_PEEL2]]:
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; CHECK-NEXT: [[SUB_PEEL3:%.*]] = sub nsw i64 [[INC_PEEL]], 3
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; CHECK-NEXT: [[ADD_PEEL4:%.*]] = add nsw i64 [[INC_PEEL]], 3
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; CHECK-NEXT: [[MUL_PEEL5:%.*]] = mul nsw i64 [[SUB_PEEL3]], [[ADD_PEEL4]]
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; CHECK-NEXT: [[REM_PEEL6:%.*]] = srem i64 [[MUL_PEEL5]], [[INC_PEEL]]
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; CHECK-NEXT: [[CONV_PEEL7:%.*]] = trunc i64 [[REM_PEEL6]] to i32
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; CHECK-NEXT: [[ARRAYIDX_PEEL8:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INC_PEEL]]
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; CHECK-NEXT: store i32 [[CONV_PEEL7]], ptr [[ARRAYIDX_PEEL8]], align 4
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; CHECK-NEXT: [[INC_PEEL9:%.*]] = add nsw i64 [[INC_PEEL]], 1
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; CHECK-NEXT: [[CMP_PEEL10:%.*]] = icmp slt i64 [[INC_PEEL9]], 45
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; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_NEXT1:.*]]
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; CHECK: [[FOR_FIRST_PEEL_NEXT1]]:
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; CHECK-NEXT: br label %[[FOR_FIRST_PEEL_NEXT11:.*]]
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; CHECK: [[FOR_FIRST_PEEL_NEXT11]]:
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; CHECK-NEXT: br label %[[FOR_FIRST_ENTRY_PEEL_NEWPH:.*]]
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; CHECK: [[FOR_FIRST_ENTRY_PEEL_NEWPH]]:
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; CHECK-NEXT: br label %[[FOR_FIRST:.*]]
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; CHECK: [[FOR_FIRST]]:
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; CHECK-NEXT: [[I_05:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_FIRST]] ], [ [[INC_PEEL9]], %[[FOR_FIRST_ENTRY_PEEL_NEWPH]] ]
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; CHECK-NEXT: [[I1_02:%.*]] = phi i64 [ [[INC14:%.*]], %[[FOR_FIRST]] ], [ 2, %[[FOR_FIRST_ENTRY_PEEL_NEWPH]] ]
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; CHECK-NEXT: [[SUB:%.*]] = sub nsw i64 [[I_05]], 3
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[I_05]], 3
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; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[SUB]], [[ADD]]
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; CHECK-NEXT: [[REM:%.*]] = srem i64 [[MUL]], [[I_05]]
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; CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[REM]] to i32
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[I_05]]
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; CHECK-NEXT: store i32 [[CONV]], ptr [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i64 [[I_05]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[INC]], 45
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; CHECK-NEXT: [[SUB7:%.*]] = sub nsw i64 [[I1_02]], 3
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; CHECK-NEXT: [[ADD8:%.*]] = add nsw i64 [[I1_02]], 3
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; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i64 [[SUB7]], [[ADD8]]
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; CHECK-NEXT: [[REM10:%.*]] = srem i64 [[MUL9]], [[I1_02]]
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; CHECK-NEXT: [[CONV11:%.*]] = trunc i64 [[REM10]] to i32
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; CHECK-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [1024 x i32], ptr @B, i64 0, i64 [[I1_02]]
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; CHECK-NEXT: store i32 [[CONV11]], ptr [[ARRAYIDX12]], align 4
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; CHECK-NEXT: [[INC14]] = add nsw i64 [[I1_02]], 1
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; CHECK-NEXT: [[CMP3:%.*]] = icmp slt i64 [[INC14]], 45
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; CHECK-NEXT: br i1 [[CMP3]], label %[[FOR_FIRST]], label %[[FOR_SECOND_EXIT:.*]]
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; CHECK: [[FOR_SECOND_EXIT]]:
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; CHECK-NEXT: br label %[[FOR_END]]
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; CHECK: [[FOR_END]]:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp4 = icmp slt i64 0, 45
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br i1 %cmp4, label %for.first.entry, label %for.second.guard
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for.first.entry: ; preds = %entry
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br label %for.first
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for.first: ; preds = %for.first.entry, %for.first
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%i.05 = phi i64 [ %inc, %for.first ], [ 0, %for.first.entry ]
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%sub = sub nsw i64 %i.05, 3
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%add = add nsw i64 %i.05, 3
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%mul = mul nsw i64 %sub, %add
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%rem = srem i64 %mul, %i.05
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%conv = trunc i64 %rem to i32
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%arrayidx = getelementptr inbounds i32, ptr %A, i64 %i.05
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store i32 %conv, ptr %arrayidx, align 4
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%inc = add nsw i64 %i.05, 1
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%cmp = icmp slt i64 %inc, 45
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br i1 %cmp, label %for.first, label %for.first.exit
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for.first.exit: ; preds = %for.first
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br label %for.second.guard
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for.second.guard: ; preds = %for.first.exit, %entry
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%cmp31 = icmp slt i64 2, 45
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br i1 %cmp31, label %for.second.entry, label %for.end
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for.second.entry: ; preds = %for.second.guard
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br label %for.second
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for.second: ; preds = %for.second.entry, %for.second
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%i1.02 = phi i64 [ %inc14, %for.second ], [ 2, %for.second.entry ]
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%sub7 = sub nsw i64 %i1.02, 3
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%add8 = add nsw i64 %i1.02, 3
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%mul9 = mul nsw i64 %sub7, %add8
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%rem10 = srem i64 %mul9, %i1.02
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%conv11 = trunc i64 %rem10 to i32
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%arrayidx12 = getelementptr inbounds [1024 x i32], ptr @B, i64 0, i64 %i1.02
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store i32 %conv11, ptr %arrayidx12, align 4
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%inc14 = add nsw i64 %i1.02, 1
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%cmp3 = icmp slt i64 %inc14, 45
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br i1 %cmp3, label %for.second, label %for.second.exit
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for.second.exit: ; preds = %for.second
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br label %for.end
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for.end: ; preds = %for.second.exit, %for.second.guard
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ret void
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}
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