edf56f1fa2
A lot of interchange tests unnecessary relied on a build with ASSERTS enabled. Instead, simply check the IR output for both negative and positive tests so that we don't rely on debug messages. This increases test coverage as these tests will now also run with non-assert builds. For a couple of files keeping some of the debug tests was useful, so separated out them out and moved them to a similarly named *-remarks.ll file.
93 lines
3.6 KiB
LLVM
93 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -passes=loop-interchange -S -verify-dom-info -verify-loop-info 2>&1 | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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@A = common global [100 x [100 x i32]] zeroinitializer
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declare void @foo(i64 %a)
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declare void @bar(i64 %a) readnone
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;;--------------------------------------Test case 02------------------------------------
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;; Safe to interchange, because the called function `bar` is marked as readnone,
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;; so it cannot introduce dependences.
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;;
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;; for(int i=0;i<100;i++) {
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;; for(int j=1;j<100;j++) {
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;; bar(i);
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;; A[j][i] = A[j][i]+k;
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;; }
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;; }
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;
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define void @interchange_02(i32 %k) {
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; CHECK-LABEL: define void @interchange_02(
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; CHECK-SAME: i32 [[K:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: br label %[[FOR2_PREHEADER:.*]]
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; CHECK: [[FOR1_HEADER_PREHEADER:.*]]:
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; CHECK-NEXT: br label %[[FOR1_HEADER:.*]]
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; CHECK: [[FOR1_HEADER]]:
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; CHECK-NEXT: [[INDVARS_IV23:%.*]] = phi i64 [ [[INDVARS_IV_NEXT24:%.*]], %[[FOR1_INC10:.*]] ], [ 0, %[[FOR1_HEADER_PREHEADER]] ]
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; CHECK-NEXT: br label %[[FOR2_SPLIT1:.*]]
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; CHECK: [[FOR2_PREHEADER]]:
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; CHECK-NEXT: br label %[[FOR2:.*]]
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; CHECK: [[FOR2]]:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[TMP0:%.*]], %[[FOR2_SPLIT:.*]] ], [ 1, %[[FOR2_PREHEADER]] ]
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; CHECK-NEXT: br label %[[FOR1_HEADER_PREHEADER]]
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; CHECK: [[FOR2_SPLIT1]]:
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; CHECK-NEXT: call void @bar(i64 [[INDVARS_IV23]])
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; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 [[INDVARS_IV]], i64 [[INDVARS_IV23]]
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; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[ARRAYIDX5]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[LV]], [[K]]
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; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX5]], align 4
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; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV]], 99
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; CHECK-NEXT: br label %[[FOR2_LOOPEXIT:.*]]
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; CHECK: [[FOR2_SPLIT]]:
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; CHECK-NEXT: [[TMP0]] = add nuw nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDVARS_IV]], 99
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; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR1_LOOPEXIT:.*]], label %[[FOR2]]
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; CHECK: [[FOR2_LOOPEXIT]]:
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; CHECK-NEXT: br label %[[FOR1_INC10]]
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; CHECK: [[FOR1_INC10]]:
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; CHECK-NEXT: [[INDVARS_IV_NEXT24]] = add nuw nsw i64 [[INDVARS_IV23]], 1
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; CHECK-NEXT: [[EXITCOND26:%.*]] = icmp eq i64 [[INDVARS_IV23]], 99
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; CHECK-NEXT: br i1 [[EXITCOND26]], label %[[FOR2_SPLIT]], label %[[FOR1_HEADER]]
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; CHECK: [[FOR1_LOOPEXIT]]:
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; CHECK-NEXT: br label %[[EXIT:.*]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for1.header
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for1.header:
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%indvars.iv23 = phi i64 [ 0, %entry ], [ %indvars.iv.next24, %for1.inc10 ]
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br label %for2
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for2:
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%indvars.iv = phi i64 [ %indvars.iv.next, %for2 ], [ 1, %for1.header ]
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call void @bar(i64 %indvars.iv23)
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%arrayidx5 = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 %indvars.iv, i64 %indvars.iv23
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%lv = load i32, ptr %arrayidx5
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%add = add nsw i32 %lv, %k
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store i32 %add, ptr %arrayidx5
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv, 99
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br i1 %exitcond, label %for2.loopexit , label %for2
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for2.loopexit:
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br label %for1.inc10
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for1.inc10:
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%indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
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%exitcond26 = icmp eq i64 %indvars.iv23, 99
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br i1 %exitcond26, label %for1.loopexit, label %for1.header
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for1.loopexit:
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br label %exit
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exit:
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ret void
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}
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