a2ddb020d7
Do not consider loops with a zero backedge taken count as candidates for interchange. This seems like a sensible thing because it suggests the loop doesn't execute and there is no point in interchanging. As a bonus, this seems to avoid triggering an assert about phis and their uses from source code, so this is a partial fix for #163954 but it needs more work to properly fix that.
55 lines
2.0 KiB
LLVM
55 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt < %s -passes=loop-interchange -loop-interchange-profitabilities=ignore -cache-line-size=64 -verify-dom-info -verify-loop-info -verify-scev -verify-loop-lcssa -S | FileCheck %s
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; Test case for issue: https://github.com/llvm/llvm-project/issues/163954
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define void @test() {
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; CHECK-LABEL: define void @test() {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[OUTER_HEADER:.*]]
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; CHECK: [[OUTER_HEADER]]:
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; CHECK-NEXT: [[I:%.*]] = phi i8 [ 0, %[[ENTRY]] ], [ [[DOTLCSSA:%.*]], %[[OUTER_LATCH:.*]] ]
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; CHECK-NEXT: br label %[[INNER_HEADER:.*]]
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; CHECK: [[INNER_HEADER]]:
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; CHECK-NEXT: [[J:%.*]] = phi i64 [ 0, %[[OUTER_HEADER]] ], [ [[J_NEXT:%.*]], %[[INNER_LATCH:.*]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = phi i8 [ [[I]], %[[OUTER_HEADER]] ], [ [[TMP1:%.*]], %[[INNER_LATCH]] ]
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; CHECK-NEXT: br label %[[INNER_BODY:.*]]
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; CHECK: [[INNER_BODY]]:
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; CHECK-NEXT: br i1 true, label %[[INNER_LATCH]], label %[[INNER_BODY]]
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; CHECK: [[INNER_LATCH]]:
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; CHECK-NEXT: [[TMP1]] = or i8 [[TMP0]], 0
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; CHECK-NEXT: [[J_NEXT]] = add i64 [[J]], 1
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; CHECK-NEXT: br i1 true, label %[[OUTER_LATCH]], label %[[INNER_HEADER]]
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; CHECK: [[OUTER_LATCH]]:
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; CHECK-NEXT: [[DOTLCSSA]] = phi i8 [ [[TMP1]], %[[INNER_LATCH]] ]
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; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[OUTER_HEADER]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %outer.header
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outer.header:
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%i = phi i8 [ 0, %entry ], [ %1, %outer.latch ]
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br label %inner.header
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inner.header:
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%j = phi i64 [ 0, %outer.header ], [ %j.next, %inner.latch ]
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%0 = phi i8 [ %i, %outer.header ], [ %1, %inner.latch ]
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br label %inner.body
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inner.body:
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br i1 true, label %inner.latch, label %inner.body ; another (self) loop, but never taken
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inner.latch:
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%1 = or i8 %0, 0
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%j.next = add i64 %j, 1
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br i1 true, label %outer.latch, label %inner.header
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outer.latch:
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br i1 true, label %exit, label %outer.header
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exit:
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ret void
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}
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