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llvm-project/llvm/test/Transforms/LoopStrengthReduce/ARM
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Sergei Barannikov ff9c041d96
[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)
Providing the correct operand index allows addPhysRegDataDeps to compute
the correct latency.

Pull Request: https://github.com/llvm/llvm-project/pull/123541
2025-02-01 20:40:50 +03:00
..
2012-06-15-lsr-noaddrmode.ll
…
addrec-is-loop-invariant.ll
…
complexity.ll
…
illegal-addr-modes.ll
…
ivchain-ARM.ll
[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)
2025-02-01 20:40:50 +03:00
lit.local.cfg
…
vctp-chains-inseltpoison.ll
…
vctp-chains.ll
…
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