03c34bb59e
This extends the existing support to work with arbitrary interleave factors. The main change here is reworking the ExtractLastActive VPInstruction to take a variable amount of arguments and handling it in unrollRecipeByUF and VPInstruction::generate. The select condition for all mask/data values in a find-last recurrence is the true if the mask for any part is true. Because of this the masks for inactive parts will be updated to all-false when the parts with active lanes are updated. This ensures the mask/data for last active element always corresponds to the greatest part with an active lane. This means finding the last element in the middle block simply requires chaining the `extract.last.active` to forward the result from the last active part through any inactive parts ahead of it.
79 lines
4.5 KiB
LLVM
79 lines
4.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
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; RUN: opt -passes=loop-vectorize -force-vector-interleave=2 -force-vector-width=1 -S < %s 2>&1 | FileCheck %s
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target triple = "aarch64-linux-gnu"
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define i32 @simple_find_last_reduction(i64 %N, ptr %data, i32 %a) {
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; CHECK-LABEL: define i32 @simple_find_last_reduction(
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; CHECK-SAME: i64 [[N:%.*]], ptr [[DATA:%.*]], i32 [[A:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 2
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[TMP1:%.*]] = urem i64 [[N]], 2
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; CHECK-NEXT: [[TMP2:%.*]] = sub i64 [[N]], [[TMP1]]
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ -1, %[[VECTOR_PH]] ], [ [[TMP14:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[VEC_PHI1:%.*]] = phi i32 [ -1, %[[VECTOR_PH]] ], [ [[TMP19:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = phi i1 [ false, %[[VECTOR_PH]] ], [ [[TMP12:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP3:%.*]] = phi i1 [ false, %[[VECTOR_PH]] ], [ [[TMP13:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[INDEX]], 1
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; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[INDEX]]
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[TMP20]]
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; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP6]], align 4
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; CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP4]], align 4
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; CHECK-NEXT: [[TMP7:%.*]] = icmp slt i32 [[A]], [[TMP5]]
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; CHECK-NEXT: [[TMP8:%.*]] = icmp slt i32 [[A]], [[TMP21]]
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; CHECK-NEXT: [[TMP9:%.*]] = freeze i1 [[TMP7]]
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; CHECK-NEXT: [[TMP10:%.*]] = freeze i1 [[TMP8]]
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; CHECK-NEXT: [[TMP11:%.*]] = or i1 [[TMP9]], [[TMP10]]
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; CHECK-NEXT: [[TMP12]] = select i1 [[TMP11]], i1 [[TMP7]], i1 [[TMP0]]
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; CHECK-NEXT: [[TMP13]] = select i1 [[TMP11]], i1 [[TMP8]], i1 [[TMP3]]
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; CHECK-NEXT: [[TMP14]] = select i1 [[TMP11]], i32 [[TMP5]], i32 [[VEC_PHI]]
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; CHECK-NEXT: [[TMP19]] = select i1 [[TMP11]], i32 [[TMP21]], i32 [[VEC_PHI1]]
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[TMP2]]
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; CHECK-NEXT: br i1 [[TMP16]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: [[TMP17:%.*]] = select i1 [[TMP12]], i32 [[TMP14]], i32 -1
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; CHECK-NEXT: [[TMP18:%.*]] = select i1 [[TMP13]], i32 [[TMP19]], i32 [[TMP17]]
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; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[TMP2]]
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; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT1:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP18]], %[[MIDDLE_BLOCK]] ], [ -1, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[EXIT:.*]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[EXIT]] ]
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; CHECK-NEXT: [[DATA_PHI:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[SELECT_DATA:%.*]], %[[EXIT]] ]
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; CHECK-NEXT: [[LD_ADDR:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[IV]]
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; CHECK-NEXT: [[LD:%.*]] = load i32, ptr [[LD_ADDR]], align 4
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; CHECK-NEXT: [[SELECT_CMP:%.*]] = icmp slt i32 [[A]], [[LD]]
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; CHECK-NEXT: [[SELECT_DATA]] = select i1 [[SELECT_CMP]], i32 [[LD]], i32 [[DATA_PHI]]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
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; CHECK-NEXT: [[EXIT_CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
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; CHECK-NEXT: br i1 [[EXIT_CMP]], label %[[EXIT1]], label %[[EXIT]], !llvm.loop [[LOOP3:![0-9]+]]
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; CHECK: [[EXIT1]]:
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; CHECK-NEXT: [[TMP15:%.*]] = phi i32 [ [[SELECT_DATA]], %[[EXIT]] ], [ [[TMP18]], %[[MIDDLE_BLOCK]] ]
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; CHECK-NEXT: ret i32 [[TMP15]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%data.phi = phi i32 [ -1, %entry ], [ %select.data, %loop ]
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%ld.addr = getelementptr inbounds i32, ptr %data, i64 %iv
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%ld = load i32, ptr %ld.addr, align 4
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%select.cmp = icmp slt i32 %a, %ld
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%select.data = select i1 %select.cmp, i32 %ld, i32 %data.phi
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%iv.next = add nuw nsw i64 %iv, 1
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%exit.cmp = icmp eq i64 %iv.next, %N
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br i1 %exit.cmp, label %exit, label %loop
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exit:
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ret i32 %select.data
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}
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