d41e517748
We use the term "interchangeable instructions" to refer to different operators that have the same meaning (e.g., `add x, 0` is equivalent to `mul x, 1`). Non-constant values are not supported, as they may incur high costs with little benefit. --------- Co-authored-by: Alexey Bataev <a.bataev@gmx.com>
62 lines
2.4 KiB
LLVM
62 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes=slp-vectorizer -S -slp-max-reg-size=1024 %s | FileCheck %s
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define void @test1(ptr %a, ptr %b) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[GEP0:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 0
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; CHECK-NEXT: [[GEP4:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 0
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; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[GEP0]], align 4
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; CHECK-NEXT: [[TMP1:%.*]] = shl <4 x i32> [[TMP0]], <i32 1, i32 0, i32 1, i32 0>
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; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[GEP4]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%gep0 = getelementptr inbounds i32, ptr %a, i64 0
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%gep1 = getelementptr inbounds i32, ptr %a, i64 1
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%gep2 = getelementptr inbounds i32, ptr %a, i64 2
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%gep3 = getelementptr inbounds i32, ptr %a, i64 3
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%0 = load i32, ptr %gep0, align 4
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%1 = load i32, ptr %gep1, align 4
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%2 = load i32, ptr %gep2, align 4
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%3 = load i32, ptr %gep3, align 4
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%op0 = shl i32 %0, 1
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%op1 = add i32 %1, zeroinitializer
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%op2 = mul i32 %2, 2
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%op3 = shl i32 %3, zeroinitializer
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%gep4 = getelementptr inbounds i32, ptr %b, i64 0
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%gep5 = getelementptr inbounds i32, ptr %b, i64 1
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%gep6 = getelementptr inbounds i32, ptr %b, i64 2
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%gep7 = getelementptr inbounds i32, ptr %b, i64 3
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store i32 %op0, ptr %gep4, align 4
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store i32 %op1, ptr %gep5, align 4
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store i32 %op2, ptr %gep6, align 4
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store i32 %op3, ptr %gep7, align 4
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ret void
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}
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define void @test2(i64 %_xstride) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[MUL3:%.*]] = mul i64 [[_XSTRIDE:%.*]], 1
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; CHECK-NEXT: [[MUL5:%.*]] = mul i64 0, 0
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; CHECK-NEXT: [[MUL9:%.*]] = sub i64 0, [[_XSTRIDE]]
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; CHECK-NEXT: [[MUL12:%.*]] = shl i64 [[_XSTRIDE]], 1
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr i8, ptr null, i64 [[MUL3]]
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; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr i8, ptr null, i64 [[MUL5]]
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; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr i8, ptr null, i64 [[MUL9]]
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; CHECK-NEXT: [[ARRAYIDX13:%.*]] = getelementptr i8, ptr null, i64 [[MUL12]]
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; CHECK-NEXT: ret void
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;
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entry:
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%mul3 = mul i64 %_xstride, 1
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%mul5 = mul i64 0, 0
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%mul9 = sub i64 0, %_xstride
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%mul12 = shl i64 %_xstride, 1
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%arrayidx = getelementptr i8, ptr null, i64 %mul3
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%arrayidx6 = getelementptr i8, ptr null, i64 %mul5
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%arrayidx10 = getelementptr i8, ptr null, i64 %mul9
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%arrayidx13 = getelementptr i8, ptr null, i64 %mul12
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ret void
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}
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