47 lines
2.5 KiB
MLIR
47 lines
2.5 KiB
MLIR
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
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// This tests check that target code nested inside a target data region which
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// has only use_device_ptr mapping corectly generates code on the device pass.
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// CHECK: define weak_odr protected amdgpu_kernel void @__omp_offloading{{.*}}main_
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// CHECK-NEXT: entry:
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// CHECK-NEXT: %[[VAL_3:.*]] = alloca ptr, align 8, addrspace(5)
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// CHECK-NEXT: %[[ASCAST:.*]] = addrspacecast ptr addrspace(5) %[[VAL_3]] to ptr
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// CHECK-NEXT: store ptr %[[VAL_4:.*]], ptr %[[ASCAST]], align 8
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// CHECK-NEXT: %[[VAL_5:.*]] = call i32 @__kmpc_target_init(ptr @__omp_offloading_{{.*}}_kernel_environment, ptr %[[VAL_6:.*]])
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// CHECK-NEXT: %[[VAL_7:.*]] = icmp eq i32 %[[VAL_5]], -1
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// CHECK-NEXT: br i1 %[[VAL_7]], label %[[VAL_8:.*]], label %[[VAL_9:.*]]
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// CHECK: user_code.entry: ; preds = %[[VAL_10:.*]]
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// CHECK-NEXT: %[[VAL_11:.*]] = load ptr, ptr %[[ASCAST]], align 8
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// CHECK-NEXT: br label %[[AFTER_ALLOC:.*]]
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// CHECK: [[AFTER_ALLOC]]:
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// CHECK-NEXT: br label %[[VAL_12:.*]]
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// CHECK: [[VAL_12]]:
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// CHECK-NEXT: br label %[[TARGET_REG_ENTRY:.*]]
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// CHECK: [[TARGET_REG_ENTRY]]: ; preds = %[[VAL_12]]
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// CHECK-NEXT: %[[VAL_13:.*]] = load ptr, ptr %[[VAL_11]], align 8
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// CHECK-NEXT: store i32 999, ptr %[[VAL_13]], align 4
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// CHECK-NEXT: br label %[[VAL_14:.*]]
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module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true } {
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llvm.func @_QQmain() attributes {fir.bindc_name = "main"} {
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%0 = llvm.mlir.constant(1 : i64) : i64
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%a = llvm.alloca %0 x !llvm.ptr : (i64) -> !llvm.ptr<5>
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%ascast = llvm.addrspacecast %a : !llvm.ptr<5> to !llvm.ptr
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%map = omp.map.info var_ptr(%ascast : !llvm.ptr, !llvm.ptr) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
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omp.target_data use_device_ptr(%map -> %arg0 : !llvm.ptr) {
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%map1 = omp.map.info var_ptr(%arg0 : !llvm.ptr, !llvm.ptr) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
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omp.target map_entries(%map1 -> %arg1 : !llvm.ptr){
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%1 = llvm.mlir.constant(999 : i32) : i32
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%2 = llvm.load %arg1 : !llvm.ptr -> !llvm.ptr
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llvm.store %1, %2 : i32, !llvm.ptr
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omp.terminator
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}
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omp.terminator
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}
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llvm.return
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}
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}
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