b7279ed5b3
It seems that depending on the platform, gcc acceptts or does not accept `-mvx` without specifying an architecture actually having vector instructions. The solution which seems to work across different versions of gcc and clang is to specify the least architecture which has vector instructions. In addition, initialization of the unused variable CPU prevents a compiler warning from gcc.
121 lines
3.5 KiB
C++
121 lines
3.5 KiB
C++
//===-- xray_tsc.h ----------------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of XRay, a dynamic runtime instrumentation system.
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//
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//===----------------------------------------------------------------------===//
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#ifndef XRAY_EMULATE_TSC_H
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#define XRAY_EMULATE_TSC_H
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#include "sanitizer_common/sanitizer_common.h"
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namespace __xray {
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static constexpr uint64_t NanosecondsPerSecond = 1000ULL * 1000 * 1000;
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}
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#if SANITIZER_FUCHSIA
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#include <zircon/syscalls.h>
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namespace __xray {
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inline bool probeRequiredCPUFeatures() XRAY_NEVER_INSTRUMENT { return true; }
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ALWAYS_INLINE uint64_t readTSC(uint8_t &CPU) XRAY_NEVER_INSTRUMENT {
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CPU = 0;
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return _zx_ticks_get();
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}
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inline uint64_t getTSCFrequency() XRAY_NEVER_INSTRUMENT {
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return _zx_ticks_per_second();
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}
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} // namespace __xray
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#else // SANITIZER_FUCHSIA
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#if defined(__x86_64__)
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#include "xray_x86_64.inc"
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#elif defined(__powerpc64__)
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#include "xray_powerpc64.inc"
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#elif defined(__arm__) || defined(__aarch64__) || defined(__mips__) || \
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defined(__hexagon__) || defined(__loongarch_lp64) || defined(__riscv)
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// Emulated TSC.
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// There is no instruction like RDTSCP in user mode on ARM. ARM's CP15 does
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// not have a constant frequency like TSC on x86(_64), it may go faster
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// or slower depending on CPU turbo or power saving mode. Furthermore,
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// to read from CP15 on ARM a kernel modification or a driver is needed.
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// We can not require this from users of compiler-rt.
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// So on ARM we use clock_gettime() which gives the result in nanoseconds.
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// To get the measurements per second, we scale this by the number of
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// nanoseconds per second, pretending that the TSC frequency is 1GHz and
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// one TSC tick is 1 nanosecond.
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#include "sanitizer_common/sanitizer_common.h"
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#include "sanitizer_common/sanitizer_internal_defs.h"
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#include "xray_defs.h"
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#include <cerrno>
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#include <cstdint>
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#include <time.h>
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namespace __xray {
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inline bool probeRequiredCPUFeatures() XRAY_NEVER_INSTRUMENT { return true; }
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ALWAYS_INLINE uint64_t readTSC(uint8_t &CPU) XRAY_NEVER_INSTRUMENT {
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timespec TS;
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int result = clock_gettime(CLOCK_REALTIME, &TS);
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if (result != 0) {
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Report("clock_gettime(2) returned %d, errno=%d.", result, int(errno));
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TS.tv_sec = 0;
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TS.tv_nsec = 0;
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}
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CPU = 0;
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return TS.tv_sec * NanosecondsPerSecond + TS.tv_nsec;
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}
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inline uint64_t getTSCFrequency() XRAY_NEVER_INSTRUMENT {
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return NanosecondsPerSecond;
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}
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} // namespace __xray
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#elif defined(__s390x__)
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#include "sanitizer_common/sanitizer_common.h"
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#include "sanitizer_common/sanitizer_internal_defs.h"
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#include "xray_defs.h"
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#include <cerrno>
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#include <cstdint>
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#include <time.h>
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namespace __xray {
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inline bool probeRequiredCPUFeatures() XRAY_NEVER_INSTRUMENT { return true; }
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ALWAYS_INLINE uint64_t readTSC(uint8_t &CPU) XRAY_NEVER_INSTRUMENT {
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CPU = 0;
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#if __has_builtin(__builtin_readcyclecounter)
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return __builtin_readcyclecounter();
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#else
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uint64_t Cycles;
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asm volatile("stckf %0" : : "Q"(Cycles) : "cc");
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return Cycles;
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#endif
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}
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inline uint64_t getTSCFrequency() XRAY_NEVER_INSTRUMENT {
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return NanosecondsPerSecond;
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}
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} // namespace __xray
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#else
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#error Target architecture is not supported.
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#endif // CPU architecture
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#endif // SANITIZER_FUCHSIA
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#endif // XRAY_EMULATE_TSC_H
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