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llvm-project/llvm/lib/TargetParser
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Pawan Nirpal a5ba6067d6
[Clang][NFC] Use Hex Encoding for Intel CPU CPUID family (#153004) 
Use Hex Encoding for CPUID family to match number format with Intel ISE
rev.58:
https://cdrdv2.intel.com/v1/dl/getContent/671368
2025-08-14 18:36:34 +02:00
..
Unix
[PowerPC][clang] Fix triple constructor ambiguity causing "unknown" target triple on AIX (#147488)
2025-07-08 22:45:56 +05:30
Windows
…
AArch64TargetParser.cpp
[NFC][Clang][FMV] Make FMV priority data type future proof. (#150079)
2025-07-23 10:37:29 +01:00
ARMTargetParser.cpp
ARM: Remove CPU from computeTargetABI (#151983)
2025-08-05 10:21:50 +09:00
ARMTargetParserCommon.cpp
…
CMakeLists.txt
[Xtensa] Add esp32/esp8266 cpus implementation. (#152409)
2025-08-12 15:17:36 +03:00
CSKYTargetParser.cpp
Triple: Forward declare Twine and remove include (#145685)
2025-06-26 15:26:04 +09:00
Host.cpp
[Clang][NFC] Use Hex Encoding for Intel CPU CPUID family (#153004)
2025-08-14 18:36:34 +02:00
LoongArchTargetParser.cpp
Triple: Forward declare Twine and remove include (#145685)
2025-06-26 15:26:04 +09:00
PPCTargetParser.cpp
[Reland] [PowerPC] frontend get target feature from backend with cpu name (#144594)
2025-06-19 09:22:16 -04:00
RISCVISAInfo.cpp
[llvm] Use a range-based for loop instead of {std,llvm}::for_each (NFC) (#150841)
2025-07-27 10:43:52 -07:00
RISCVTargetParser.cpp
[RISCV] Get host CPU name via hwprobe (#142745)
2025-06-12 16:39:57 +08:00
SubtargetFeature.cpp
…
TargetParser.cpp
[Clang][AMDGPU] Add builtins for some buffer resource atomics (#149216)
2025-08-05 11:04:15 -06:00
Triple.cpp
Add MTIA and META to triple (#150236)
2025-07-28 10:03:20 -07:00
X86TargetParser.cpp
[NFC] Add parentheses around arithmetic operand (#149489)
2025-07-18 18:23:46 +08:00
XtensaTargetParser.cpp
[Xtensa] Add esp32/esp8266 cpus implementation. (#152409)
2025-08-12 15:17:36 +03:00