7d88a05cc0
Reuse most of RISCV's implementation with several exceptions:
1. Assign signext/zeroext attribute to args passed in stack.
On RISCV, integer scalars passed in registers have signext/zeroext
when promoted, but are anyext if passed on the stack. This is defined
in early RISCV ABI specification. But after this change [1], integers
should also be signext/zeroext if passed on the stack. So I think
RISCV's ABI lowering should be updated [2].
While in LoongArch ABI spec, we can see that integer scalars narrower
than GRLEN bits are zero/sign-extended no matter passed in registers
or on the stack.
2. Zero-width bit fields are ignored.
This matches GCC's behavior but it hasn't been documented in ABI sepc.
See https://gcc.gnu.org/r12-8294.
3. `char` is signed by default.
There is another difference worth mentioning is that `char` is signed
by default on LoongArch while it is unsigned on RISCV.
This patch also adds `_BitInt` type support to LoongArch and handle it
in LoongArchABIInfo::classifyArgumentType.
[1] cec39a064e
[2] https://github.com/llvm/llvm-project/issues/57261
Differential Revision: https://reviews.llvm.org/D132285
96 lines
2.5 KiB
C++
96 lines
2.5 KiB
C++
// RUN: %clang_cc1 -triple loongarch64 -target-feature +f -target-feature +d -target-abi lp64d \
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// RUN: -emit-llvm %s -o - | FileCheck %s
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#include <stdint.h>
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/// Ensure that fields inherited from a parent struct are treated in the same
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/// way as fields directly in the child for the purposes of LoongArch ABI rules.
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struct parent1_int32_s {
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int32_t i1;
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};
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struct child1_int32_s : parent1_int32_s {
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int32_t i2;
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};
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// CHECK-LABEL: define{{.*}} i64 @_Z30int32_int32_struct_inheritance14child1_int32_s(i64 %a.coerce)
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struct child1_int32_s int32_int32_struct_inheritance(struct child1_int32_s a) {
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return a;
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}
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struct parent2_int32_s {
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int32_t i1;
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};
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struct child2_float_s : parent2_int32_s {
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float f1;
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};
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// CHECK-LABEL: define{{.*}} { i32, float } @_Z30int32_float_struct_inheritance14child2_float_s(i32 %0, float %1)
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struct child2_float_s int32_float_struct_inheritance(struct child2_float_s a) {
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return a;
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}
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struct parent3_float_s {
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float f1;
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};
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struct child3_int64_s : parent3_float_s {
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int64_t i1;
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};
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// CHECK-LABEL: define{{.*}} { float, i64 } @_Z30float_int64_struct_inheritance14child3_int64_s(float %0, i64 %1)
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struct child3_int64_s float_int64_struct_inheritance(struct child3_int64_s a) {
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return a;
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}
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struct parent4_double_s {
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double d1;
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};
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struct child4_double_s : parent4_double_s {
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double d1;
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};
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// CHECK-LABEL: define{{.*}} { double, double } @_Z32double_double_struct_inheritance15child4_double_s(double %0, double %1)
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struct child4_double_s double_double_struct_inheritance(struct child4_double_s a) {
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return a;
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}
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/// When virtual inheritance is used, the resulting struct isn't eligible for
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/// passing in registers.
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struct parent5_virtual_s {
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int32_t i1;
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};
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struct child5_virtual_s : virtual parent5_virtual_s {
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float f1;
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};
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// CHECK-LABEL: define{{.*}} void @_ZN16child5_virtual_sC1EOS_(ptr noundef nonnull align 8 dereferenceable(12) %this, ptr noundef nonnull align 8 dereferenceable(12) %0)
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struct child5_virtual_s int32_float_virtual_struct_inheritance(struct child5_virtual_s a) {
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return a;
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}
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/// Check for correct lowering in the presence of diamond inheritance.
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struct parent6_float_s {
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float f1;
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};
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struct child6a_s : parent6_float_s {
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};
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struct child6b_s : parent6_float_s {
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};
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struct grandchild_6_s : child6a_s, child6b_s {
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};
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// CHECK-LABEL: define{{.*}} { float, float } @_Z38float_float_diamond_struct_inheritance14grandchild_6_s(float %0, float %1)
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struct grandchild_6_s float_float_diamond_struct_inheritance(struct grandchild_6_s a) {
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return a;
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}
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