cac6d431d0
https://github.com/llvm/llvm-project/pull/129952 / 42d49a77241df73a17cb442973702fc460e7fb90 added this test which is failing on 32-bit ARM because the alignment chosen is 4 not 8. Which would make sense if this is a 32/64 bit difference https://lab.llvm.org/buildbot/#/builders/154/builds/13059 ``` <stdin>:34:30: note: scanning from here define dso_local void @_Z1fv(ptr dead_on_unwind noalias writable sret(%struct.B) align 4 %agg.result) #0 { ^ <stdin>:38:2: note: possible intended match here %0 = load ptr, ptr @x, align 4 ^ ``` The other test does not check alignment, so I'm assuming that it is not important here.
29 lines
966 B
C++
29 lines
966 B
C++
// RUN: %clang_cc1 -triple %itanium_abi_triple -std=c++23 %s -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -triple %itanium_abi_triple -std=c++20 %s -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -triple %itanium_abi_triple -std=c++17 %s -emit-llvm -o - | FileCheck %s
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extern int& s;
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// CHECK-LABEL: @_Z4testv()
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[I:%.*]] = alloca ptr, align {{.*}}
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// CHECK-NEXT: [[X:%.*]] = load ptr, ptr @s, align {{.*}}
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// CHECK-NEXT: store ptr [[X]], ptr [[I]], align {{.*}}
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int& test() {
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auto &i = s;
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return i;
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}
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// CHECK-LABEL: @_Z1fv(
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// CHECK: [[X1:%.*]] = load ptr, ptr @x, align {{.*}}
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// CHECK-NEXT: store ptr [[X1]]
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// CHECK: [[X2:%.*]] = load ptr, ptr @x, align {{.*}}
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// CHECK-NEXT: store ptr [[X2]]
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// CHECK: [[X3:%.*]] = load ptr, ptr @x, align {{.*}}
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// CHECK-NEXT: store ptr [[X3]]
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int &ff();
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int &x = ff();
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struct A { int& x; };
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struct B { A x[20]; };
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B f() { return {x,x,x,x,x,x,x,x,x,x,x,x,x,x,x,x,x,x,x,x}; }
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