
- Adding the changes from PRs: - #116331 - #121852 - Fixes test `tools/dxil-dis/debug-info.ll` - Address some missed comments in the previous PR --------- Co-authored-by: joaosaffran <joao.saffran@microsoft.com>
49 lines
1.5 KiB
HLSL
49 lines
1.5 KiB
HLSL
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.3-library %s -fnative-half-type -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple spirv-vulkan-library %s -fnative-half-type -emit-llvm -o - | FileCheck %s
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// CHECK: define {{.*}} i32 {{.*}}test_branch{{.*}}(i32 {{.*}} [[VALD:%.*]])
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// CHECK: [[PARAM:%.*]] = load i32, ptr [[VALD]].addr, align 4
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// CHECK: [[CMP:%.*]] = icmp sgt i32 [[PARAM]], 0
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// CHECK: br i1 [[CMP]], label %if.then, label %if.else, !hlsl.controlflow.hint [[HINT_BRANCH:![0-9]+]]
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export int test_branch(int X){
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int resp;
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[branch] if (X > 0) {
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resp = -X;
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} else {
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resp = X * 2;
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}
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return resp;
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}
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// CHECK: define {{.*}} i32 {{.*}}test_flatten{{.*}}(i32 {{.*}} [[VALD:%.*]])
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// CHECK: [[PARAM:%.*]] = load i32, ptr [[VALD]].addr, align 4
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// CHECK: [[CMP:%.*]] = icmp sgt i32 [[PARAM]], 0
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// CHECK: br i1 [[CMP]], label %if.then, label %if.else, !hlsl.controlflow.hint [[HINT_FLATTEN:![0-9]+]]
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export int test_flatten(int X){
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int resp;
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[flatten] if (X > 0) {
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resp = -X;
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} else {
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resp = X * 2;
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}
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return resp;
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}
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// CHECK: define {{.*}} i32 {{.*}}test_no_attr{{.*}}(i32 {{.*}} [[VALD:%.*]])
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// CHECK-NOT: !hlsl.controlflow.hint
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export int test_no_attr(int X){
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int resp;
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if (X > 0) {
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resp = -X;
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} else {
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resp = X * 2;
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}
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return resp;
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}
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//CHECK: [[HINT_BRANCH]] = !{!"hlsl.controlflow.hint", i32 1}
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//CHECK: [[HINT_FLATTEN]] = !{!"hlsl.controlflow.hint", i32 2}
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