8f3e78f971
If we have a v_mov_b32 or v_accvgpr_write_b32 with an inline immediate, replace it with a pseudo which writes to the combined AV_* class. This relaxes the operand constraints, which will allow the allocator to inflate the register class to AV_* to potentially avoid spilling. The allocator does not know how to replace an instruction to enable the change of register class. I originally tried to do this by changing all of the places we introduce v_mov_b32 with immediate, but it's along tail of niche cases that require manual updating. Plus we can restrict this to only run on functions where we know we will be allocating AGPRs.
24 lines
834 B
C++
24 lines
834 B
C++
//===- AMDGPUPrepareAGPRAlloc.h ---------------------------------*- C++- *-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUPREPAREAGPRALLOC_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUPREPAREAGPRALLOC_H
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#include "llvm/CodeGen/MachinePassManager.h"
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namespace llvm {
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class AMDGPUPrepareAGPRAllocPass
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: public PassInfoMixin<AMDGPUPrepareAGPRAllocPass> {
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public:
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PreservedAnalyses run(MachineFunction &MF,
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MachineFunctionAnalysisManager &MFAM);
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};
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} // namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUPREPAREAGPRALLOC_H
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