bcaf31ec3f
A target can return if a misaligned access is 'fast' as defined by the target or not. In reality there can be different levels of 'fast' and 'slow'. This patch changes the boolean 'Fast' argument of the allowsMisalignedMemoryAccesses family of functions to an unsigned representing its speed. A target can still define it as it wants and the direct translation of the current code uses 0 and 1 for current false and true. This makes the change an NFC. Subsequent patch will start using an actual value of speed in the load/store vectorizer to compare if a vectorized access going to be not just fast, but not slower than before. Differential Revision: https://reviews.llvm.org/D124217
83 lines
3.3 KiB
C++
83 lines
3.3 KiB
C++
//===-- Mips16ISelLowering.h - Mips16 DAG Lowering Interface ----*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Subclass of MipsTargetLowering specialized for mips16.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H
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#define LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H
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#include "MipsISelLowering.h"
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namespace llvm {
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class Mips16TargetLowering : public MipsTargetLowering {
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public:
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explicit Mips16TargetLowering(const MipsTargetMachine &TM,
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const MipsSubtarget &STI);
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bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
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Align Alignment,
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MachineMemOperand::Flags Flags,
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unsigned *Fast) const override;
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MachineBasicBlock *
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EmitInstrWithCustomInserter(MachineInstr &MI,
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MachineBasicBlock *MBB) const override;
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private:
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bool isEligibleForTailCallOptimization(
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const CCState &CCInfo, unsigned NextStackOffset,
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const MipsFunctionInfo &FI) const override;
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void setMips16HardFloatLibCalls();
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unsigned int
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getMips16HelperFunctionStubNumber(ArgListTy &Args) const;
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const char *getMips16HelperFunction
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(Type* RetTy, ArgListTy &Args, bool &needHelper) const;
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void
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getOpndList(SmallVectorImpl<SDValue> &Ops,
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std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
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bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
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bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee,
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SDValue Chain) const override;
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MachineBasicBlock *emitSel16(unsigned Opc, MachineInstr &MI,
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MachineBasicBlock *BB) const;
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MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
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MachineInstr &MI,
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MachineBasicBlock *BB) const;
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MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
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MachineInstr &MI,
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MachineBasicBlock *BB) const;
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MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
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MachineInstr &MI,
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MachineBasicBlock *BB) const;
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MachineBasicBlock *emitFEXT_T8I8I16_ins(unsigned BtOpc, unsigned CmpiOpc,
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unsigned CmpiXOpc, bool ImmSigned,
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MachineInstr &MI,
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MachineBasicBlock *BB) const;
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MachineBasicBlock *emitFEXT_CCRX16_ins(unsigned SltOpc, MachineInstr &MI,
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MachineBasicBlock *BB) const;
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MachineBasicBlock *emitFEXT_CCRXI16_ins(unsigned SltiOpc, unsigned SltiXOpc,
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MachineInstr &MI,
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MachineBasicBlock *BB) const;
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};
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}
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#endif
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