
- Add the boilerplate to support instcombine in SPIRV - instcombine length(X-Y) to distance(X,Y) - switch HLSL's distance intrinsic to not special case for SPIRV. - fixes #122766 - This RFC we were requested to add in the infra for pattern matching: https://discourse.llvm.org/t/rfc-add-targetbuiltins-for-spirv-to-support-hlsl/83329/13
33 lines
927 B
TableGen
33 lines
927 B
TableGen
//===-- SPIRV.td - Describe the SPIR-V Target Machine ------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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include "SPIRVRegisterInfo.td"
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include "SPIRVRegisterBanks.td"
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include "SPIRVInstrInfo.td"
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include "SPIRVCombine.td"
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include "SPIRVBuiltins.td"
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def SPIRVInstrInfo : InstrInfo;
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class Proc<string Name, list<SubtargetFeature> Features>
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: Processor<Name, NoItineraries, Features>;
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def : Proc<"generic", []>;
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def SPIRVInstPrinter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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def SPIRV : Target {
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let InstructionSet = SPIRVInstrInfo;
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let AssemblyWriters = [SPIRVInstPrinter];
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}
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