2b3a410f5b
DependenceAnalysis checks whether the given addresses are divisible by the element size of corresponding load/store instructions. However, this check was only executed when the two instructions (Src and Dst) are different. We must also perform the same check when Src and Dst are the same instruction. Fix the test added in #147715.
96 lines
5.4 KiB
LLVM
96 lines
5.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -disable-output -passes="print<da>" 2>&1 | FileCheck %s
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; Test that the dependence analysis pass does seg-fault due to a null pointer
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; dereference. The code in gcdMIVTest requires a null check for the result of
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; getConstantPart.
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target datalayout = "e-m:e-p:32:32-i1:32-i64:64-a:0-v32:32-n16:32"
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%0 = type { i32 }
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%1 = type { [2 x [512 x %0]], [512 x %0], %2, [144 x i8], %9, %10, %11, %12, %17, [12 x i8], %18, %19, %21, [128 x i8] }
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%2 = type { [64 x i16], [64 x i16], [64 x %0], [64 x %0], [128 x %0], [128 x %0], [256 x %0], [256 x %0], [32 x %0], [32 x %0], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], %3, %4, %5, [32 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], %6, %7, [32 x i32], [32 x i32], [32 x i32], [64 x i16], %8, [8 x i64], [4 x i64], [2 x i64], [256 x i8], [256 x i32], [64 x i16], [64 x i16] }
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%3 = type { [64 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [64 x i32], [64 x i32], [64 x i32], [64 x i32], [64 x i32], [64 x i32], [64 x i32], [64 x i32], [64 x i32], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [32 x %0], [32 x %0], [128 x i8] }
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%4 = type { [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16] }
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%5 = type { [128 x i8], [256 x i8], [256 x i8] }
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%6 = type { [64 x i32], [128 x i16], [64 x i16], [64 x i16], [64 x i16] }
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%7 = type { [192 x %0], [192 x %0], [384 x %0], [1984 x %0] }
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%8 = type { [128 x i8], [128 x i8], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16], [64 x i16] }
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%9 = type { [32 x %0], [32 x %0], [64 x i32], [64 x i32], [64 x i32], [64 x i32] }
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%10 = type { [1536 x %0], [2048 x %0], [512 x i32], [256 x i32], [32 x %0], [64 x i32], [128 x i8], [512 x i32], [1024 x %0] }
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%11 = type { [512 x i32], [512 x i32], [1024 x %0], [512 x i32], [512 x %0] }
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%12 = type { %13, [2048 x %0], [2048 x %0], [256 x i32], [1024 x i32], %14, [512 x %0], [256 x i32], %15, [4 x [256 x %0]], [4 x [256 x %0]], [256 x i32], [8 x [32 x i32]], [8 x [32 x %0]], [384 x %0], [256 x i32], %16 }
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%13 = type { [2048 x %0] }
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%14 = type { [1024 x %0], [1024 x %0] }
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%15 = type { [256 x %0], [256 x %0] }
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%16 = type { [128 x %0], [128 x %0] }
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%17 = type { [32 x %0], [32 x i32], [32 x i32], [32 x i32], [32 x i32], [2 x [8 x [32 x %0]]], [512 x %0], [512 x %0], [58 x i16] }
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%18 = type { [512 x i8] }
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%19 = type { [2048 x %0], [2560 x i16], %20, [512 x i32], [256 x i32], [512 x i8] }
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%20 = type { [768 x i32] }
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%21 = type { [416 x i32] }
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define void @test(ptr %A, ptr %B, i1 %arg, i32 %n, i32 %m) #0 align 2 {
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; CHECK-LABEL: 'test'
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; CHECK-NEXT: Src: %v1 = load i32, ptr %B, align 4 --> Dst: %v1 = load i32, ptr %B, align 4
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; CHECK-NEXT: da analyze - none!
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; CHECK-NEXT: Src: %v1 = load i32, ptr %B, align 4 --> Dst: %v27 = load <32 x i32>, ptr %v25, align 256
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; CHECK-NEXT: da analyze - confused!
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; CHECK-NEXT: Src: %v1 = load i32, ptr %B, align 4 --> Dst: %v32 = load <32 x i32>, ptr %v30, align 128
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; CHECK-NEXT: da analyze - confused!
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; CHECK-NEXT: Src: %v27 = load <32 x i32>, ptr %v25, align 256 --> Dst: %v27 = load <32 x i32>, ptr %v25, align 256
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; CHECK-NEXT: da analyze - consistent input [0 S S]!
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; CHECK-NEXT: Runtime Assumptions:
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; CHECK-NEXT: Equal predicate: (zext i7 (4 * (trunc i32 %v1 to i7) * (1 + (trunc i32 %n to i7))) to i32) == 0
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; CHECK-NEXT: Equal predicate: (8 * (zext i4 (trunc i32 %v1 to i4) to i32))<nuw><nsw> == 0
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; CHECK-NEXT: Src: %v27 = load <32 x i32>, ptr %v25, align 256 --> Dst: %v32 = load <32 x i32>, ptr %v30, align 128
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; CHECK-NEXT: da analyze - input [* S S|<]!
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; CHECK-NEXT: Runtime Assumptions:
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; CHECK-NEXT: Equal predicate: (zext i7 (4 * (trunc i32 %v1 to i7) * (1 + (trunc i32 %n to i7))) to i32) == 0
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; CHECK-NEXT: Equal predicate: (8 * (zext i4 (trunc i32 %v1 to i4) to i32))<nuw><nsw> == 0
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; CHECK-NEXT: Src: %v32 = load <32 x i32>, ptr %v30, align 128 --> Dst: %v32 = load <32 x i32>, ptr %v30, align 128
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; CHECK-NEXT: da analyze - consistent input [0 S S]!
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; CHECK-NEXT: Runtime Assumptions:
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; CHECK-NEXT: Equal predicate: (zext i7 (4 * (trunc i32 %v1 to i7) * (1 + (trunc i32 %n to i7))) to i32) == 0
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; CHECK-NEXT: Equal predicate: (8 * (zext i4 (trunc i32 %v1 to i4) to i32))<nuw><nsw> == 0
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;
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entry:
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%v1 = load i32, ptr %B, align 4
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br label %bb13
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bb13:
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%v2 = phi i32 [ 0, %entry ], [ %v39, %bb38 ]
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br i1 %arg, label %bb15, label %bb38
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bb15:
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%v3 = mul nsw i32 %v2, 2
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br label %bb17
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bb17:
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br i1 %arg, label %bb21, label %bb37
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bb21:
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%v22 = add nsw i32 %n, 1
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%v23 = add i32 %v22, %v3
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%v24 = mul nsw i32 %v23, %v1
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%v25 = getelementptr inbounds %1, ptr %A, i32 0, i32 7, i32 1, i32 %v24
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%v27 = load <32 x i32>, ptr %v25, align 256
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%v28 = add i32 %m, %v3
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%v29 = mul nsw i32 %v28, 32
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%v30 = getelementptr inbounds %1, ptr %A, i32 0, i32 7, i32 14, i32 %v29
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%v32 = load <32 x i32>, ptr %v30, align 128
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br i1 %arg, label %bb21, label %bb37
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bb37:
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br i1 %arg, label %bb17, label %bb38
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bb38:
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%v39 = add nsw i32 %v2, 1
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br label %bb13
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bb40:
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ret void
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}
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attributes #0 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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