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llvm-project/llvm/test/CodeGen/AArch64/Atomics
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Guy David 76274eb2b3
[PHIElimination] Revert #131837 #146320 #146337 (#146850) 
Reverting because mis-compiles:
- https://github.com/llvm/llvm-project/pull/131837
- https://github.com/llvm/llvm-project/pull/146320
- https://github.com/llvm/llvm-project/pull/146337
2025-07-03 07:48:08 -04:00
..
aarch64_be-atomic-load-lse2_lse128.ll
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aarch64_be-atomic-load-lse2.ll
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aarch64_be-atomic-load-outline_atomics.ll
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aarch64_be-atomic-load-rcpc3.ll
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aarch64_be-atomic-load-rcpc.ll
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aarch64_be-atomic-load-v8_1a.ll
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aarch64_be-atomic-load-v8a.ll
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aarch64_be-atomic-store-lse2_lse128.ll
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aarch64_be-atomic-store-lse2.ll
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aarch64_be-atomic-store-outline_atomics.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
aarch64_be-atomic-store-rcpc3.ll
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aarch64_be-atomic-store-rcpc.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
aarch64_be-atomic-store-v8_1a.ll
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aarch64_be-atomic-store-v8a.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
aarch64_be-atomicrmw-lse2_lse128.ll
[AArch64] Add SUBS(CSEL) fold from brcond. (#142103)
2025-06-06 18:00:00 +01:00
aarch64_be-atomicrmw-lse2.ll
[AArch64] Add SUBS(CSEL) fold from brcond. (#142103)
2025-06-06 18:00:00 +01:00
aarch64_be-atomicrmw-lsfe.ll
[AArch64] Add SUBS(CSEL) fold from brcond. (#142103)
2025-06-06 18:00:00 +01:00
aarch64_be-atomicrmw-outline_atomics.ll
[AArch64] Add SUBS(CSEL) fold from brcond. (#142103)
2025-06-06 18:00:00 +01:00
aarch64_be-atomicrmw-rcpc3.ll
[AArch64] Add SUBS(CSEL) fold from brcond. (#142103)
2025-06-06 18:00:00 +01:00
aarch64_be-atomicrmw-rcpc.ll
[AArch64] Add SUBS(CSEL) fold from brcond. (#142103)
2025-06-06 18:00:00 +01:00
aarch64_be-atomicrmw-v8_1a.ll
[AArch64] Add SUBS(CSEL) fold from brcond. (#142103)
2025-06-06 18:00:00 +01:00
aarch64_be-atomicrmw-v8a_fp.ll
[AArch64] Add SUBS(CSEL) fold from brcond. (#142103)
2025-06-06 18:00:00 +01:00
aarch64_be-atomicrmw-v8a.ll
[AArch64] Add SUBS(CSEL) fold from brcond. (#142103)
2025-06-06 18:00:00 +01:00
aarch64_be-cmpxchg-lse2_lse128.ll
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aarch64_be-cmpxchg-lse2.ll
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aarch64_be-cmpxchg-outline_atomics.ll
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aarch64_be-cmpxchg-rcpc3.ll
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aarch64_be-cmpxchg-rcpc.ll
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aarch64_be-cmpxchg-v8_1a.ll
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aarch64_be-cmpxchg-v8a.ll
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aarch64_be-fence.ll
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aarch64-atomic-exchange-fence.ll
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aarch64-atomic-load-lse2_lse128.ll
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aarch64-atomic-load-lse2.ll
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aarch64-atomic-load-outline_atomics.ll
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aarch64-atomic-load-rcpc3.ll
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aarch64-atomic-load-rcpc_immo.ll
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aarch64-atomic-load-rcpc.ll
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aarch64-atomic-load-v8_1a.ll
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aarch64-atomic-load-v8a.ll
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aarch64-atomic-store-lse2_lse128.ll
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aarch64-atomic-store-lse2.ll
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aarch64-atomic-store-outline_atomics.ll
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aarch64-atomic-store-rcpc3.ll
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aarch64-atomic-store-rcpc_immo.ll
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aarch64-atomic-store-rcpc.ll
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aarch64-atomic-store-v8_1a.ll
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aarch64-atomic-store-v8a.ll
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aarch64-atomicrmw-lse2_lse128.ll
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aarch64-atomicrmw-lse2.ll
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aarch64-atomicrmw-lsfe.ll
[AArch64] Add SUBS(CSEL) fold from brcond. (#142103)
2025-06-06 18:00:00 +01:00
aarch64-atomicrmw-outline_atomics.ll
…
aarch64-atomicrmw-rcpc3.ll
…
aarch64-atomicrmw-rcpc.ll
…
aarch64-atomicrmw-v8_1a.ll
…
aarch64-atomicrmw-v8a_fp.ll
[AArch64] Add SUBS(CSEL) fold from brcond. (#142103)
2025-06-06 18:00:00 +01:00
aarch64-atomicrmw-v8a.ll
…
aarch64-cmpxchg-lse2_lse128.ll
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aarch64-cmpxchg-lse2.ll
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aarch64-cmpxchg-outline_atomics.ll
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aarch64-cmpxchg-rcpc3.ll
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aarch64-cmpxchg-rcpc.ll
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aarch64-cmpxchg-v8_1a.ll
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aarch64-cmpxchg-v8a.ll
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aarch64-fence.ll
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generate-tests.py
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