61510b51c3
This reverts commit 9c319d5bb40785c969d2af76535ca62448dfafa7. Some issues were discovered with the bootstrap builds, which seem like they were caused by this commit. I'm reverting to investigate.
405 lines
12 KiB
LLVM
405 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-linux-gnu | FileCheck %s
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define i64 @addimm_mulimm_accept_00(i64 %a) {
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; CHECK-LABEL: addimm_mulimm_accept_00:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #37 // =0x25
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; CHECK-NEXT: mov x9, #1147 // =0x47b
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; CHECK-NEXT: madd x0, x0, x8, x9
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; CHECK-NEXT: ret
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%tmp0 = add i64 %a, 31
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%tmp1 = mul i64 %tmp0, 37
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ret i64 %tmp1
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}
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define i64 @addimm_mulimm_accept_01(i64 %a) {
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; CHECK-LABEL: addimm_mulimm_accept_01:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #37 // =0x25
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; CHECK-NEXT: mov x9, #-1147 // =0xfffffffffffffb85
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; CHECK-NEXT: madd x0, x0, x8, x9
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; CHECK-NEXT: ret
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%tmp0 = add i64 %a, -31
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%tmp1 = mul i64 %tmp0, 37
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ret i64 %tmp1
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}
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define signext i32 @addimm_mulimm_accept_02(i32 signext %a) {
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; CHECK-LABEL: addimm_mulimm_accept_02:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #37 // =0x25
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; CHECK-NEXT: mov w9, #1147 // =0x47b
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; CHECK-NEXT: madd w0, w0, w8, w9
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, 31
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%tmp1 = mul i32 %tmp0, 37
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ret i32 %tmp1
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}
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define signext i32 @addimm_mulimm_accept_03(i32 signext %a) {
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; CHECK-LABEL: addimm_mulimm_accept_03:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #37 // =0x25
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; CHECK-NEXT: mov w9, #-1147 // =0xfffffb85
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; CHECK-NEXT: madd w0, w0, w8, w9
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, -31
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%tmp1 = mul i32 %tmp0, 37
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ret i32 %tmp1
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}
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define i64 @addimm_mulimm_accept_10(i64 %a) {
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; CHECK-LABEL: addimm_mulimm_accept_10:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #37 // =0x25
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; CHECK-NEXT: mov w9, #32888 // =0x8078
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; CHECK-NEXT: movk w9, #17, lsl #16
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; CHECK-NEXT: madd x0, x0, x8, x9
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; CHECK-NEXT: ret
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%tmp0 = add i64 %a, 31000
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%tmp1 = mul i64 %tmp0, 37
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ret i64 %tmp1
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}
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define i64 @addimm_mulimm_accept_11(i64 %a) {
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; CHECK-LABEL: addimm_mulimm_accept_11:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #37 // =0x25
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; CHECK-NEXT: mov x9, #-32888 // =0xffffffffffff7f88
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; CHECK-NEXT: movk x9, #65518, lsl #16
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; CHECK-NEXT: madd x0, x0, x8, x9
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; CHECK-NEXT: ret
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%tmp0 = add i64 %a, -31000
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%tmp1 = mul i64 %tmp0, 37
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ret i64 %tmp1
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}
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define signext i32 @addimm_mulimm_accept_12(i32 signext %a) {
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; CHECK-LABEL: addimm_mulimm_accept_12:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #37 // =0x25
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; CHECK-NEXT: mov w9, #32888 // =0x8078
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; CHECK-NEXT: movk w9, #17, lsl #16
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; CHECK-NEXT: madd w0, w0, w8, w9
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, 31000
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%tmp1 = mul i32 %tmp0, 37
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ret i32 %tmp1
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}
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define signext i32 @addimm_mulimm_accept_13(i32 signext %a) {
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; CHECK-LABEL: addimm_mulimm_accept_13:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #37 // =0x25
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; CHECK-NEXT: mov w9, #32648 // =0x7f88
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; CHECK-NEXT: movk w9, #65518, lsl #16
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; CHECK-NEXT: madd w0, w0, w8, w9
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, -31000
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%tmp1 = mul i32 %tmp0, 37
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ret i32 %tmp1
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}
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define i64 @addimm_mulimm_reject_00(i64 %a) {
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; CHECK-LABEL: addimm_mulimm_reject_00:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #3700 // =0xe74
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; CHECK-NEXT: add x9, x0, #3100
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; CHECK-NEXT: mul x0, x9, x8
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; CHECK-NEXT: ret
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%tmp0 = add i64 %a, 3100
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%tmp1 = mul i64 %tmp0, 3700
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ret i64 %tmp1
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}
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define i64 @addimm_mulimm_reject_01(i64 %a) {
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; CHECK-LABEL: addimm_mulimm_reject_01:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #3700 // =0xe74
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; CHECK-NEXT: sub x9, x0, #3100
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; CHECK-NEXT: mul x0, x9, x8
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; CHECK-NEXT: ret
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%tmp0 = add i64 %a, -3100
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%tmp1 = mul i64 %tmp0, 3700
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ret i64 %tmp1
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}
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define signext i32 @addimm_mulimm_reject_02(i32 signext %a) {
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; CHECK-LABEL: addimm_mulimm_reject_02:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #3700 // =0xe74
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; CHECK-NEXT: add w9, w0, #3100
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; CHECK-NEXT: mul w0, w9, w8
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, 3100
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%tmp1 = mul i32 %tmp0, 3700
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ret i32 %tmp1
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}
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define signext i32 @addimm_mulimm_reject_03(i32 signext %a) {
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; CHECK-LABEL: addimm_mulimm_reject_03:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #3700 // =0xe74
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; CHECK-NEXT: sub w9, w0, #3100
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; CHECK-NEXT: mul w0, w9, w8
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, -3100
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%tmp1 = mul i32 %tmp0, 3700
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ret i32 %tmp1
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}
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define signext i32 @addmuladd(i32 signext %a) {
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; CHECK-LABEL: addmuladd:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #324 // =0x144
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; CHECK-NEXT: mov w9, #1300 // =0x514
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; CHECK-NEXT: madd w0, w0, w8, w9
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, 4
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%tmp1 = mul i32 %tmp0, 324
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%tmp2 = add i32 %tmp1, 4
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ret i32 %tmp2
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}
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define signext i32 @addmuladd_multiuse(i32 signext %a) {
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; CHECK-LABEL: addmuladd_multiuse:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #324 // =0x144
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; CHECK-NEXT: mov w9, #1300 // =0x514
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; CHECK-NEXT: madd w8, w0, w8, w9
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; CHECK-NEXT: add w9, w0, #4
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; CHECK-NEXT: eor w0, w9, w8
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, 4
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%tmp1 = mul i32 %tmp0, 324
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%tmp2 = add i32 %tmp1, 4
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%tmp3 = xor i32 %tmp0, %tmp2
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ret i32 %tmp3
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}
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define signext i32 @addmuladd_multiusemul(i32 signext %a) {
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; CHECK-LABEL: addmuladd_multiusemul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #324 // =0x144
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: add w9, w8, #1296
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; CHECK-NEXT: add w8, w8, #1300
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; CHECK-NEXT: eor w0, w9, w8
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, 4
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%tmp1 = mul i32 %tmp0, 324
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%tmp2 = add i32 %tmp1, 4
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%tmp3 = xor i32 %tmp1, %tmp2
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ret i32 %tmp3
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}
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define signext i32 @addmuladd_multiuse2(i32 signext %a) {
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; CHECK-LABEL: addmuladd_multiuse2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #324 // =0x144
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; CHECK-NEXT: lsl w9, w0, #2
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; CHECK-NEXT: mov w10, #1300 // =0x514
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; CHECK-NEXT: madd w8, w0, w8, w10
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; CHECK-NEXT: add w9, w9, #20
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; CHECK-NEXT: eor w0, w8, w9
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, 4
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%tmp1 = mul i32 %tmp0, 4
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%tmp2 = add i32 %tmp1, 4
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%tmp3 = mul i32 %tmp0, 324
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%tmp4 = add i32 %tmp3, 4
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%tmp5 = xor i32 %tmp4, %tmp2
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ret i32 %tmp5
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}
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define signext i32 @addaddmuladd(i32 signext %a, i32 %b) {
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; CHECK-LABEL: addaddmuladd:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #324 // =0x144
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; CHECK-NEXT: madd w8, w0, w8, w1
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; CHECK-NEXT: add w0, w8, #1300
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, 4
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%tmp1 = mul i32 %tmp0, 324
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%tmp2 = add i32 %tmp1, %b
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%tmp3 = add i32 %tmp2, 4
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ret i32 %tmp3
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}
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define signext i32 @addaddmuladd_multiuse(i32 signext %a, i32 %b) {
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; CHECK-LABEL: addaddmuladd_multiuse:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #324 // =0x144
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; CHECK-NEXT: add w9, w0, #4
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; CHECK-NEXT: madd w8, w0, w8, w1
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; CHECK-NEXT: add w8, w8, #1300
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; CHECK-NEXT: eor w0, w9, w8
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, 4
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%tmp1 = mul i32 %tmp0, 324
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%tmp2 = add i32 %tmp1, %b
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%tmp3 = add i32 %tmp2, 4
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%tmp4 = xor i32 %tmp0, %tmp3
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ret i32 %tmp4
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}
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define signext i32 @addaddmuladd_multiuse2(i32 signext %a, i32 %b) {
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; CHECK-LABEL: addaddmuladd_multiuse2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #324 // =0x144
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; CHECK-NEXT: mov w9, #162 // =0xa2
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; CHECK-NEXT: madd w8, w0, w8, w1
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; CHECK-NEXT: madd w9, w0, w9, w1
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; CHECK-NEXT: add w8, w8, #1300
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; CHECK-NEXT: add w9, w9, #652
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; CHECK-NEXT: eor w0, w9, w8
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; CHECK-NEXT: ret
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%tmp0 = add i32 %a, 4
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%tmp1 = mul i32 %tmp0, 324
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%tmp2 = add i32 %tmp1, %b
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%tmp3 = add i32 %tmp2, 4
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%tmp1b = mul i32 %tmp0, 162
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%tmp2b = add i32 %tmp1b, %b
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%tmp3b = add i32 %tmp2b, 4
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%tmp4 = xor i32 %tmp3b, %tmp3
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ret i32 %tmp4
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}
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define <4 x i32> @addmuladd_vec(<4 x i32> %a) {
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; CHECK-LABEL: addmuladd_vec:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #324 // =0x144
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; CHECK-NEXT: mov w9, #1300 // =0x514
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; CHECK-NEXT: dup v2.4s, w8
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; CHECK-NEXT: dup v1.4s, w9
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; CHECK-NEXT: mla v1.4s, v0.4s, v2.4s
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; CHECK-NEXT: mov v0.16b, v1.16b
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; CHECK-NEXT: ret
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%tmp0 = add <4 x i32> %a, <i32 4, i32 4, i32 4, i32 4>
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%tmp1 = mul <4 x i32> %tmp0, <i32 324, i32 324, i32 324, i32 324>
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%tmp2 = add <4 x i32> %tmp1, <i32 4, i32 4, i32 4, i32 4>
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ret <4 x i32> %tmp2
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}
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define <4 x i32> @addmuladd_vec_multiuse(<4 x i32> %a) {
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; CHECK-LABEL: addmuladd_vec_multiuse:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi v1.4s, #4
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; CHECK-NEXT: mov w8, #324 // =0x144
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; CHECK-NEXT: dup v2.4s, w8
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; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: mla v1.4s, v0.4s, v2.4s
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; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b
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; CHECK-NEXT: ret
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%tmp0 = add <4 x i32> %a, <i32 4, i32 4, i32 4, i32 4>
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%tmp1 = mul <4 x i32> %tmp0, <i32 324, i32 324, i32 324, i32 324>
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%tmp2 = add <4 x i32> %tmp1, <i32 4, i32 4, i32 4, i32 4>
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%tmp3 = xor <4 x i32> %tmp0, %tmp2
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ret <4 x i32> %tmp3
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}
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define void @addmuladd_gep(ptr %p, i64 %a) {
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; CHECK-LABEL: addmuladd_gep:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #40 // =0x28
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; CHECK-NEXT: str wzr, [x0, #10]!
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; CHECK-NEXT: madd x8, x1, x8, x0
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; CHECK-NEXT: str wzr, [x8, #20]
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; CHECK-NEXT: ret
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%q = getelementptr i8, ptr %p, i64 10
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%r = getelementptr [10 x [10 x i32]], ptr %q, i64 0, i64 %a, i64 5
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store i32 0, ptr %q
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store i32 0, ptr %r
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ret void
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}
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define i32 @addmuladd_gep2(ptr %p, i32 %a) {
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; CHECK-LABEL: addmuladd_gep2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #3240 // =0xca8
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; CHECK-NEXT: // kill: def $w1 killed $w1 def $x1
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; CHECK-NEXT: smaddl x8, w1, w8, x0
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; CHECK-NEXT: ldr w8, [x8, #3260]
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; CHECK-NEXT: tbnz w8, #31, .LBB22_2
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; CHECK-NEXT: // %bb.1:
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB22_2: // %then
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; CHECK-NEXT: sxtw x8, w1
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; CHECK-NEXT: add x8, x8, #1
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; CHECK-NEXT: str x8, [x0]
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; CHECK-NEXT: mov w0, #1 // =0x1
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; CHECK-NEXT: ret
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%b = sext i32 %a to i64
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%c = add nsw i64 %b, 1
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%d = mul nsw i64 %c, 81
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%g = getelementptr [10 x [10 x i32]], ptr %p, i64 0, i64 %d, i64 5
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%l = load i32, ptr %g, align 4
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%cc = icmp slt i32 %l, 0
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br i1 %cc, label %then, label %else
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then:
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store i64 %c, ptr %p
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ret i32 1
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else:
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ret i32 0
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}
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define signext i32 @addmuladd_multiuse2_nsw(i32 signext %a) {
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; CHECK-LABEL: addmuladd_multiuse2_nsw:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #324 // =0x144
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; CHECK-NEXT: lsl w9, w0, #2
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; CHECK-NEXT: mov w10, #1300 // =0x514
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; CHECK-NEXT: madd w8, w0, w8, w10
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; CHECK-NEXT: add w9, w9, #20
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; CHECK-NEXT: eor w0, w8, w9
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; CHECK-NEXT: ret
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%tmp0 = add nsw i32 %a, 4
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%tmp1 = mul nsw i32 %tmp0, 4
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%tmp2 = add nsw i32 %tmp1, 4
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%tmp3 = mul nsw i32 %tmp0, 324
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%tmp4 = add nsw i32 %tmp3, 4
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%tmp5 = xor i32 %tmp4, %tmp2
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ret i32 %tmp5
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}
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define signext i32 @addmuladd_multiuse2_nuw(i32 signext %a) {
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; CHECK-LABEL: addmuladd_multiuse2_nuw:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #324 // =0x144
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; CHECK-NEXT: lsl w9, w0, #2
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; CHECK-NEXT: mov w10, #1300 // =0x514
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; CHECK-NEXT: madd w8, w0, w8, w10
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; CHECK-NEXT: add w9, w9, #20
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; CHECK-NEXT: eor w0, w8, w9
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; CHECK-NEXT: ret
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%tmp0 = add nuw i32 %a, 4
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%tmp1 = mul nuw i32 %tmp0, 4
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%tmp2 = add nuw i32 %tmp1, 4
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%tmp3 = mul nuw i32 %tmp0, 324
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%tmp4 = add nuw i32 %tmp3, 4
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%tmp5 = xor i32 %tmp4, %tmp2
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ret i32 %tmp5
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}
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define signext i32 @addmuladd_multiuse2_nswnuw(i32 signext %a) {
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; CHECK-LABEL: addmuladd_multiuse2_nswnuw:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #324 // =0x144
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; CHECK-NEXT: lsl w9, w0, #2
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; CHECK-NEXT: mov w10, #1300 // =0x514
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; CHECK-NEXT: madd w8, w0, w8, w10
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; CHECK-NEXT: add w9, w9, #20
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; CHECK-NEXT: eor w0, w8, w9
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; CHECK-NEXT: ret
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%tmp0 = add nsw nuw i32 %a, 4
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%tmp1 = mul nsw nuw i32 %tmp0, 4
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%tmp2 = add nsw nuw i32 %tmp1, 4
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%tmp3 = mul nsw nuw i32 %tmp0, 324
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%tmp4 = add nsw nuw i32 %tmp3, 4
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%tmp5 = xor i32 %tmp4, %tmp2
|
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ret i32 %tmp5
|
|
}
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|