147c5d6686
The patch is based on a reverted patch: https://reviews.llvm.org/D103597. It was trying to rename registers before alias check, which is not safe and causes miscompiles. This patch does 2 things: 1. Do the renaming with necessary checks passed, including alias check. 2. Rename the register for the instructions between the pairs and combine the second load into the first. By doing so we can just check the renamability between the pairs and avoid scanning unknown amount of instructions before/after the pairs. Necessary refactoring has been made in order to reuse as much code possible with STR renaming.
134 lines
3.7 KiB
LLVM
134 lines
3.7 KiB
LLVM
; RUN: llc -aarch64-load-store-renaming=true -verify-machineinstrs -mtriple=arm64-linux-gnu -pre-RA-sched=linearize -enable-misched=false -disable-post-ra < %s | FileCheck %s
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%va_list = type {ptr, ptr, ptr, i32, i32}
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@var = dso_local global %va_list zeroinitializer, align 8
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declare void @llvm.va_start(ptr)
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define dso_local void @test_simple(i32 %n, ...) {
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; CHECK-LABEL: test_simple:
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; CHECK: sub sp, sp, #[[STACKSIZE:[0-9]+]]
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; CHECK: add [[STACK_TOP:x[0-9]+]], sp, #[[STACKSIZE]]
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; CHECK: adrp x[[VA_LIST_HI:[0-9]+]], var
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; CHECK: add x[[VA_LIST:[0-9]+]], {{x[0-9]+}}, :lo12:var
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; CHECK-DAG: stp x6, x7, [sp, #
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; ... omit middle ones ...
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; CHECK-DAG: str x1, [sp, #[[GR_BASE:[0-9]+]]]
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; CHECK-DAG: stp q0, q1, [sp]
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; ... omit middle ones ...
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; CHECK-DAG: stp q6, q7, [sp, #
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; CHECK: str [[STACK_TOP]], [x[[VA_LIST]]]
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; CHECK: add [[GR_TOPTMP:x[0-9]+]], sp, #[[GR_BASE]]
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; CHECK: add [[GR_TOP:x[0-9]+]], [[GR_TOPTMP]], #56
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; CHECK: mov [[VR_TOPTMP:x[0-9]+]], sp
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; CHECK: add [[VR_TOP:x[0-9]+]], [[VR_TOPTMP]], #128
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; CHECK: stp [[GR_TOP]], [[VR_TOP]], [x[[VA_LIST]], #8]
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; CHECK: mov [[GRVR:x[0-9]+]], #-56
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; CHECK: movk [[GRVR]], #65408, lsl #32
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; CHECK: str [[GRVR]], [x[[VA_LIST]], #24]
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call void @llvm.va_start(ptr @var)
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ret void
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}
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define dso_local void @test_fewargs(i32 %n, i32 %n1, i32 %n2, float %m, ...) {
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; CHECK-LABEL: test_fewargs:
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; CHECK: sub sp, sp, #[[STACKSIZE:[0-9]+]]
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; CHECK: add [[STACK_TOP:x[0-9]+]], sp, #[[STACKSIZE]]
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; CHECK: adrp x[[VA_LIST_HI:[0-9]+]], var
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; CHECK: add x[[VA_LIST:[0-9]+]], {{x[0-9]+}}, :lo12:var
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; CHECK-DAG: stp x6, x7, [sp, #
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; ... omit middle ones ...
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; CHECK-DAG: str x3, [sp, #[[GR_BASE:[0-9]+]]]
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; CHECK-DAG: stp q6, q7, [sp, #80]
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; ... omit middle ones ...
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; CHECK-DAG: str q1, [sp]
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; CHECK: str [[STACK_TOP]], [x[[VA_LIST]]]
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; CHECK: add [[GR_TOPTMP:x[0-9]+]], sp, #[[GR_BASE]]
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; CHECK: add [[GR_TOP:x[0-9]+]], [[GR_TOPTMP]], #40
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; CHECK: mov [[VR_TOPTMP:x[0-9]+]], sp
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; CHECK: add [[VR_TOP:x[0-9]+]], [[VR_TOPTMP]], #112
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; CHECK: stp [[GR_TOP]], [[VR_TOP]], [x[[VA_LIST]], #8]
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; CHECK: mov [[GRVR_OFFS:x[0-9]+]], #-40
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; CHECK: movk [[GRVR_OFFS]], #65424, lsl #32
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; CHECK: str [[GRVR_OFFS]], [x[[VA_LIST]], #24]
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call void @llvm.va_start(ptr @var)
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ret void
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}
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define dso_local void @test_nospare([8 x i64], [8 x float], ...) {
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; CHECK-LABEL: test_nospare:
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call void @llvm.va_start(ptr @var)
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; CHECK-NOT: sub sp, sp
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; CHECK: mov [[STACK:x[0-9]+]], sp
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; CHECK: add x[[VAR:[0-9]+]], {{x[0-9]+}}, :lo12:var
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; CHECK: str [[STACK]], [x[[VAR]]]
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ret void
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}
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; If there are non-variadic arguments on the stack (here two i64s) then the
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; __stack field should point just past them.
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define dso_local void @test_offsetstack([8 x i64], [2 x i64], [3 x float], ...) {
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; CHECK-LABEL: test_offsetstack:
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; CHECK-DAG: stp {{q[0-9]+}}, {{q[0-9]+}}, [sp, #48]
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; CHECK-DAG: stp {{q[0-9]+}}, {{q[0-9]+}}, [sp, #16]
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; CHECK-DAG: str {{q[0-9]+}}, [sp]
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; CHECK-DAG: add [[STACK_TOP:x[0-9]+]], sp, #96
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; CHECK-DAG: add x[[VAR:[0-9]+]], {{x[0-9]+}}, :lo12:var
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; CHECK-DAG: str [[STACK_TOP]], [x[[VAR]]]
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call void @llvm.va_start(ptr @var)
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ret void
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}
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declare void @llvm.va_end(ptr)
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define dso_local void @test_va_end() nounwind {
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; CHECK-LABEL: test_va_end:
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; CHECK-NEXT: %bb.0
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call void @llvm.va_end(ptr @var)
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ret void
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; CHECK-NEXT: ret
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}
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declare void @llvm.va_copy(ptr %dest, ptr %src)
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@second_list = dso_local global %va_list zeroinitializer
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define dso_local void @test_va_copy() {
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; CHECK-LABEL: test_va_copy:
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call void @llvm.va_copy(ptr @second_list, ptr @var)
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; CHECK: add x[[SRC:[0-9]+]], {{x[0-9]+}}, :lo12:var
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; CHECK: ldp [[BLOCKA:q[0-9]+]], [[BLOCKB:q[0-9]+]], [x[[SRC]]]
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; CHECK: add x[[DST:[0-9]+]], {{x[0-9]+}}, :lo12:second_list
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; CHECK: stp [[BLOCKA]], [[BLOCKB]], [x[[DST]]]
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ret void
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; CHECK: ret
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}
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