
Refresh of the generic scheduling model to use A510 instead of A55. Main benefits are to the little core, and introducing SVE scheduling information. Changes tested on various OoO cores, no performance degradation is seen. Differential Revision: https://reviews.llvm.org/D156799
85 lines
2.3 KiB
LLVM
85 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-bcc-offset-bits=3 < %s | FileCheck %s
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define i32 @invert_bcc(float %x, float %y) #0 {
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; CHECK-LABEL: invert_bcc:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: fcmp s0, s1
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: mov w8, #42 ; =0x2a
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; CHECK-NEXT: b.pl LBB0_3
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; CHECK-NEXT: b LBB0_2
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; CHECK-NEXT: LBB0_3:
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; CHECK-NEXT: b.gt LBB0_2
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; CHECK-NEXT: ; %bb.1: ; %common.ret
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; CHECK-NEXT: str w8, [x8]
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; CHECK-NEXT: ret
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; CHECK-NEXT: LBB0_2: ; %bb2
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; CHECK-NEXT: mov w0, #1 ; =0x1
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; CHECK-NEXT: mov w8, #9 ; =0x9
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; CHECK-NEXT: ; InlineAsm Start
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: ; InlineAsm End
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; CHECK-NEXT: str w8, [x8]
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; CHECK-NEXT: ret
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%1 = fcmp ueq float %x, %y
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br i1 %1, label %bb1, label %bb2
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bb2:
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call void asm sideeffect
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"nop
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nop",
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""() #0
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store volatile i32 9, ptr undef
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ret i32 1
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bb1:
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store volatile i32 42, ptr undef
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ret i32 0
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}
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declare i32 @foo() #0
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define i32 @block_split(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: block_split:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: cmp w0, #5
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; CHECK-NEXT: b.ne LBB1_1
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; CHECK-NEXT: b LBB1_2
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; CHECK-NEXT: LBB1_1: ; %lor.lhs.false
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; CHECK-NEXT: lsl w8, w1, #1
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; CHECK-NEXT: cmp w1, #7
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; CHECK-NEXT: csinc w8, w8, w1, lt
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; CHECK-NEXT: cmp w8, #16
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; CHECK-NEXT: b.le LBB1_2
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; CHECK-NEXT: b LBB1_3
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; CHECK-NEXT: LBB1_2: ; %if.then
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; CHECK-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
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; CHECK-NEXT: bl _foo
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; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
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; CHECK-NEXT: LBB1_3: ; %if.end
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; CHECK-NEXT: mov w0, #7 ; =0x7
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; CHECK-NEXT: ret
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entry:
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%cmp = icmp eq i32 %a, 5
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br i1 %cmp, label %if.then, label %lor.lhs.false
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lor.lhs.false: ; preds = %entry
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%cmp1 = icmp slt i32 %b, 7
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%mul = shl nsw i32 %b, 1
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%add = add nsw i32 %b, 1
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%cond = select i1 %cmp1, i32 %mul, i32 %add
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%cmp2 = icmp slt i32 %cond, 17
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br i1 %cmp2, label %if.then, label %if.end
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if.then: ; preds = %lor.lhs.false, %entry
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%call = tail call i32 @foo()
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br label %if.end
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if.end: ; preds = %if.then, %lor.lhs.false
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ret i32 7
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}
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attributes #0 = { nounwind }
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