db158c7c83
Refresh of the generic scheduling model to use A510 instead of A55. Main benefits are to the little core, and introducing SVE scheduling information. Changes tested on various OoO cores, no performance degradation is seen. Differential Revision: https://reviews.llvm.org/D156799
46 lines
1.6 KiB
LLVM
46 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=-neon < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=-neon -mattr=+cssc < %s | FileCheck %s -check-prefix=CHECK-CSSC
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declare i128 @llvm.ctpop.i128(i128)
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define i128 @ctpop_i128(i128 %i) {
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; CHECK-LABEL: ctpop_i128:
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; CHECK: // %bb.0:
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; CHECK-NEXT: lsr x9, x0, #1
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; CHECK-NEXT: lsr x10, x1, #1
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; CHECK-NEXT: mov x8, #72340172838076673 // =0x101010101010101
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; CHECK-NEXT: and x9, x9, #0x5555555555555555
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; CHECK-NEXT: and x10, x10, #0x5555555555555555
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; CHECK-NEXT: sub x9, x0, x9
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; CHECK-NEXT: sub x10, x1, x10
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; CHECK-NEXT: mov x1, xzr
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; CHECK-NEXT: lsr x11, x9, #2
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; CHECK-NEXT: lsr x12, x10, #2
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; CHECK-NEXT: and x9, x9, #0x3333333333333333
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; CHECK-NEXT: and x10, x10, #0x3333333333333333
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; CHECK-NEXT: and x11, x11, #0x3333333333333333
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; CHECK-NEXT: add x9, x9, x11
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; CHECK-NEXT: and x11, x12, #0x3333333333333333
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; CHECK-NEXT: add x9, x9, x9, lsr #4
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; CHECK-NEXT: add x10, x10, x11
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; CHECK-NEXT: add x10, x10, x10, lsr #4
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; CHECK-NEXT: and x9, x9, #0xf0f0f0f0f0f0f0f
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; CHECK-NEXT: mul x9, x9, x8
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; CHECK-NEXT: and x10, x10, #0xf0f0f0f0f0f0f0f
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; CHECK-NEXT: mul x8, x10, x8
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; CHECK-NEXT: lsr x9, x9, #56
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; CHECK-NEXT: add x0, x9, x8, lsr #56
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; CHECK-NEXT: ret
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;
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; CHECK-CSSC-LABEL: ctpop_i128:
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; CHECK-CSSC: // %bb.0:
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; CHECK-CSSC-NEXT: cnt x8, x1
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; CHECK-CSSC-NEXT: cnt x9, x0
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; CHECK-CSSC-NEXT: mov x1, xzr
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; CHECK-CSSC-NEXT: add x0, x9, x8
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; CHECK-CSSC-NEXT: ret
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%c = call i128 @llvm.ctpop.i128(i128 %i)
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ret i128 %c
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}
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