78 lines
2.8 KiB
LLVM
78 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
; RUN: llc -mtriple arm64-none-eabi -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD
|
|
; RUN: llc -mtriple arm64-none-eabi -global-isel -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI
|
|
|
|
@out = internal global i32 0, align 4
|
|
|
|
; Ensure that we transform select(C0, x, select(C1, x, y)) towards
|
|
; select(C0 | C1, x, y) so we can use CMP;CCMP for the implementation.
|
|
define i32 @test0(i32 %v0, i32 %v1, i32 %v2) {
|
|
; CHECK-SD-LABEL: test0:
|
|
; CHECK-SD: // %bb.0:
|
|
; CHECK-SD-NEXT: cmp w0, #7
|
|
; CHECK-SD-NEXT: ccmp w1, #0, #0, ne
|
|
; CHECK-SD-NEXT: csel w0, w1, w2, gt
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: test0:
|
|
; CHECK-GI: // %bb.0:
|
|
; CHECK-GI-NEXT: cmp w0, #7
|
|
; CHECK-GI-NEXT: csel w8, w1, w2, eq
|
|
; CHECK-GI-NEXT: cmp w1, #0
|
|
; CHECK-GI-NEXT: csel w0, w1, w8, gt
|
|
; CHECK-GI-NEXT: ret
|
|
%cmp1 = icmp eq i32 %v0, 7
|
|
%cmp2 = icmp sgt i32 %v1, 0
|
|
%sel0 = select i1 %cmp1, i32 %v1, i32 %v2
|
|
%sel1 = select i1 %cmp2, i32 %v1, i32 %sel0
|
|
ret i32 %sel1
|
|
}
|
|
|
|
; Usually we keep select(C0 | C1, x, y) as is on aarch64 to create CMP;CCMP
|
|
; sequences. This case should be transformed to select(C0, select(C1, x, y), y)
|
|
; anyway to get CSE effects.
|
|
define void @test1(i32 %bitset, i32 %val0, i32 %val1) {
|
|
; CHECK-SD-LABEL: test1:
|
|
; CHECK-SD: // %bb.0:
|
|
; CHECK-SD-NEXT: cmp w0, #7
|
|
; CHECK-SD-NEXT: adrp x9, out
|
|
; CHECK-SD-NEXT: csel w8, w1, w2, eq
|
|
; CHECK-SD-NEXT: cmp w8, #13
|
|
; CHECK-SD-NEXT: csel w8, w1, w2, lo
|
|
; CHECK-SD-NEXT: cmp w0, #42
|
|
; CHECK-SD-NEXT: csel w10, w1, w8, eq
|
|
; CHECK-SD-NEXT: str w8, [x9, :lo12:out]
|
|
; CHECK-SD-NEXT: str w10, [x9, :lo12:out]
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: test1:
|
|
; CHECK-GI: // %bb.0:
|
|
; CHECK-GI-NEXT: cmp w0, #7
|
|
; CHECK-GI-NEXT: csel w8, w1, w2, eq
|
|
; CHECK-GI-NEXT: cmp w8, #13
|
|
; CHECK-GI-NEXT: cset w8, lo
|
|
; CHECK-GI-NEXT: tst w8, #0x1
|
|
; CHECK-GI-NEXT: csel w9, w1, w2, ne
|
|
; CHECK-GI-NEXT: cmp w0, #42
|
|
; CHECK-GI-NEXT: cset w10, eq
|
|
; CHECK-GI-NEXT: orr w8, w10, w8
|
|
; CHECK-GI-NEXT: tst w8, #0x1
|
|
; CHECK-GI-NEXT: adrp x8, out
|
|
; CHECK-GI-NEXT: csel w10, w1, w2, ne
|
|
; CHECK-GI-NEXT: str w9, [x8, :lo12:out]
|
|
; CHECK-GI-NEXT: str w10, [x8, :lo12:out]
|
|
; CHECK-GI-NEXT: ret
|
|
%cmp1 = icmp eq i32 %bitset, 7
|
|
%cond = select i1 %cmp1, i32 %val0, i32 %val1
|
|
%cmp5 = icmp ult i32 %cond, 13
|
|
%cond11 = select i1 %cmp5, i32 %val0, i32 %val1
|
|
%cmp3 = icmp eq i32 %bitset, 42
|
|
%or.cond = or i1 %cmp3, %cmp5
|
|
%cond17 = select i1 %or.cond, i32 %val0, i32 %val1
|
|
store volatile i32 %cond11, ptr @out, align 4
|
|
store volatile i32 %cond17, ptr @out, align 4
|
|
ret void
|
|
}
|
|
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
|
|
; CHECK: {{.*}}
|