61510b51c3
This reverts commit 9c319d5bb40785c969d2af76535ca62448dfafa7. Some issues were discovered with the bootstrap builds, which seem like they were caused by this commit. I'm reverting to investigate.
126 lines
3.3 KiB
LLVM
126 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
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define void @test_load_store(ptr %in, ptr %out) {
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; CHECK-LABEL: test_load_store:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr h0, [x0]
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; CHECK-NEXT: str h0, [x1]
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; CHECK-NEXT: ret
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%val = load half, ptr %in
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store half %val, ptr %out
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ret void
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}
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define i16 @test_bitcast_from_half(ptr %addr) {
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; CHECK-LABEL: test_bitcast_from_half:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldrh w0, [x0]
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; CHECK-NEXT: ret
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%val = load half, ptr %addr
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%val_int = bitcast half %val to i16
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ret i16 %val_int
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}
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define i16 @test_reg_bitcast_from_half(half %in) {
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; CHECK-LABEL: test_reg_bitcast_from_half:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $h0 killed $h0 def $s0
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; CHECK-NEXT: fmov w0, s0
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; CHECK-NEXT: ret
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%val = bitcast half %in to i16
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ret i16 %val
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}
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define void @test_bitcast_to_half(ptr %addr, i16 %in) {
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; CHECK-LABEL: test_bitcast_to_half:
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; CHECK: // %bb.0:
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; CHECK-NEXT: strh w1, [x0]
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; CHECK-NEXT: ret
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%val_fp = bitcast i16 %in to half
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store half %val_fp, ptr %addr
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ret void
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}
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define half @test_reg_bitcast_to_half(i16 %in) {
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; CHECK-LABEL: test_reg_bitcast_to_half:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov s0, w0
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; CHECK-NEXT: // kill: def $h0 killed $h0 killed $s0
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; CHECK-NEXT: ret
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%val = bitcast i16 %in to half
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ret half %val
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}
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define float @test_extend32(ptr %addr) {
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; CHECK-LABEL: test_extend32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr h0, [x0]
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; CHECK-NEXT: fcvt s0, h0
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; CHECK-NEXT: ret
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%val16 = load half, ptr %addr
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%val32 = fpext half %val16 to float
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ret float %val32
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}
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define double @test_extend64(ptr %addr) {
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; CHECK-LABEL: test_extend64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr h0, [x0]
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; CHECK-NEXT: fcvt d0, h0
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; CHECK-NEXT: ret
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%val16 = load half, ptr %addr
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%val32 = fpext half %val16 to double
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ret double %val32
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}
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define void @test_trunc32(float %in, ptr %addr) {
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; CHECK-LABEL: test_trunc32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fcvt h0, s0
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; CHECK-NEXT: str h0, [x0]
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; CHECK-NEXT: ret
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%val16 = fptrunc float %in to half
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store half %val16, ptr %addr
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ret void
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}
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define void @test_trunc64(double %in, ptr %addr) {
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; CHECK-LABEL: test_trunc64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fcvt h0, d0
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; CHECK-NEXT: str h0, [x0]
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; CHECK-NEXT: ret
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%val16 = fptrunc double %in to half
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store half %val16, ptr %addr
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ret void
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}
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define i16 @test_fccmp(i1 %a, i16 %in) {
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; CHECK-LABEL: test_fccmp:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov s0, w1
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; CHECK-NEXT: mov w8, #24576 // =0x6000
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; CHECK-NEXT: movk w8, #15974, lsl #16
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; CHECK-NEXT: fmov s1, w8
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; CHECK-NEXT: mov w8, #16384 // =0x4000
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; CHECK-NEXT: fcvt s0, h0
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; CHECK-NEXT: movk w8, #15428, lsl #16
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; CHECK-NEXT: fmov s2, w8
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; CHECK-NEXT: mov w8, #4 // =0x4
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; CHECK-NEXT: fcmp s0, s1
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; CHECK-NEXT: fccmp s0, s2, #8, pl
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; CHECK-NEXT: csinc w8, w8, wzr, mi
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; CHECK-NEXT: fcmp s0, s1
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; CHECK-NEXT: cinc w0, w8, pl
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; CHECK-NEXT: ret
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%f16 = bitcast i16 %in to half
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%cmp0 = fcmp ogt half 0xH3333, %f16
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%cmp1 = fcmp ogt half 0xH2222, %f16
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%x = select i1 %cmp0, i16 0, i16 1
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%or = or i1 %cmp1, %cmp0
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%y = select i1 %or, i16 4, i16 1
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%r = add i16 %x, %y
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ret i16 %r
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}
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