llvm-project/llvm/test/CodeGen/AArch64/large-stack-cmp.ll
Igor Kudrin 6e54fccede [AArch64] Emit fewer CFI instructions for synchronous unwind tables
The instruction-precise, or asynchronous, unwind tables usually take up
much more space than the synchronous ones. If a user is concerned about
the load size of the program and does not need the features provided
with the asynchronous tables, the compiler should be able to generate
the more compact variant.

This patch changes the generation of CFI instructions for these cases so
that they all come in one chunk in the prolog; it emits only one
`.cfi_def_cfa*` instruction followed by `.cfi_offset` ones after all
stack adjustments and register spills, and avoids generating CFI
instructions in the epilog(s) as well as any other exceeding CFI
instructions like `.cfi_remember_state` and `.cfi_restore_state`.
Effectively, it reverses the effects of D111411 and D114545 on functions
with the `uwtable(sync)` attribute. As a side effect, it also restores
the behavior on functions that have neither `uwtable` nor `nounwind`
attributes.

Differential Revision: https://reviews.llvm.org/D153098
2023-07-01 16:31:09 -07:00

47 lines
1.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=arm64-apple-ios %s -o - | FileCheck %s
define void @foo() {
; CHECK-LABEL: foo:
; CHECK: ; %bb.0:
; CHECK-NEXT: stp x28, x27, [sp, #-32]! ; 16-byte Folded Spill
; CHECK-NEXT: stp x29, x30, [sp, #16] ; 16-byte Folded Spill
; CHECK-NEXT: sub sp, sp, #1, lsl #12 ; =4096
; CHECK-NEXT: sub sp, sp, #80
; CHECK-NEXT: .cfi_def_cfa_offset 4208
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: .cfi_offset w27, -24
; CHECK-NEXT: .cfi_offset w28, -32
; CHECK-NEXT: adds x8, sp, #1, lsl #12 ; =4096
; CHECK-NEXT: cmn x8, #32
; CHECK-NEXT: b.eq LBB0_2
; CHECK-NEXT: ; %bb.1: ; %false
; CHECK-NEXT: bl _baz
; CHECK-NEXT: b LBB0_3
; CHECK-NEXT: LBB0_2: ; %true
; CHECK-NEXT: bl _bar
; CHECK-NEXT: LBB0_3: ; %common.ret
; CHECK-NEXT: add sp, sp, #1, lsl #12 ; =4096
; CHECK-NEXT: add sp, sp, #80
; CHECK-NEXT: ldp x29, x30, [sp, #16] ; 16-byte Folded Reload
; CHECK-NEXT: ldp x28, x27, [sp], #32 ; 16-byte Folded Reload
; CHECK-NEXT: ret
%var = alloca i32, i32 12
%var2 = alloca i32, i32 1030
%tst = icmp eq ptr %var, null
br i1 %tst, label %true, label %false
true:
call void @bar()
ret void
false:
call void @baz()
ret void
}
declare void @bar()
declare void @baz()