db158c7c83
Refresh of the generic scheduling model to use A510 instead of A55. Main benefits are to the little core, and introducing SVE scheduling information. Changes tested on various OoO cores, no performance degradation is seen. Differential Revision: https://reviews.llvm.org/D156799
177 lines
6.1 KiB
LLVM
177 lines
6.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64 -sink-insts-to-avoid-spills | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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@A = external dso_local global [100 x i32], align 4
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define i32 @sink_load_and_copy(i32 %n) {
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; CHECK-LABEL: sink_load_and_copy:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: stp x30, x21, [sp, #-32]! // 16-byte Folded Spill
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; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset w19, -8
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; CHECK-NEXT: .cfi_offset w20, -16
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; CHECK-NEXT: .cfi_offset w21, -24
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; CHECK-NEXT: .cfi_offset w30, -32
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; CHECK-NEXT: mov w19, w0
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; CHECK-NEXT: cmp w0, #1
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; CHECK-NEXT: b.lt .LBB0_3
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; CHECK-NEXT: // %bb.1: // %for.body.preheader
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; CHECK-NEXT: adrp x8, A
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; CHECK-NEXT: mov w20, w19
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; CHECK-NEXT: ldr w21, [x8, :lo12:A]
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; CHECK-NEXT: .LBB0_2: // %for.body
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: mov w0, w21
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; CHECK-NEXT: bl _Z3usei
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; CHECK-NEXT: sdiv w20, w20, w0
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; CHECK-NEXT: subs w19, w19, #1
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; CHECK-NEXT: b.ne .LBB0_2
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; CHECK-NEXT: b .LBB0_4
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; CHECK-NEXT: .LBB0_3:
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; CHECK-NEXT: mov w20, w19
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; CHECK-NEXT: .LBB0_4: // %for.cond.cleanup
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; CHECK-NEXT: mov w0, w20
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; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldp x30, x21, [sp], #32 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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%cmp63 = icmp sgt i32 %n, 0
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br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader:
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%0 = load i32, ptr @A, align 4
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br label %for.body
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for.cond.cleanup:
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%sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
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ret i32 %sum.0.lcssa
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for.body:
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%lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
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%sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
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%call = tail call i32 @_Z3usei(i32 %0)
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%div = sdiv i32 %sum.065, %call
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%lsr.iv.next = add i32 %lsr.iv, -1
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%exitcond.not = icmp eq i32 %lsr.iv.next, 0
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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define i32 @cant_sink_successive_call(i32 %n) {
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; CHECK-LABEL: cant_sink_successive_call:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: stp x30, x21, [sp, #-32]! // 16-byte Folded Spill
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; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset w19, -8
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; CHECK-NEXT: .cfi_offset w20, -16
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; CHECK-NEXT: .cfi_offset w21, -24
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; CHECK-NEXT: .cfi_offset w30, -32
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; CHECK-NEXT: mov w19, w0
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; CHECK-NEXT: cmp w0, #1
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; CHECK-NEXT: b.lt .LBB1_3
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; CHECK-NEXT: // %bb.1: // %for.body.preheader
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; CHECK-NEXT: adrp x8, A
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; CHECK-NEXT: mov w0, w19
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; CHECK-NEXT: ldr w20, [x8, :lo12:A]
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; CHECK-NEXT: bl _Z3usei
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; CHECK-NEXT: mov w21, w19
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; CHECK-NEXT: .LBB1_2: // %for.body
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: mov w0, w20
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; CHECK-NEXT: bl _Z3usei
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; CHECK-NEXT: sdiv w21, w21, w0
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; CHECK-NEXT: subs w19, w19, #1
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; CHECK-NEXT: b.ne .LBB1_2
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; CHECK-NEXT: b .LBB1_4
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; CHECK-NEXT: .LBB1_3:
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; CHECK-NEXT: mov w21, w19
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; CHECK-NEXT: .LBB1_4: // %for.cond.cleanup
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; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: mov w0, w21
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; CHECK-NEXT: ldp x30, x21, [sp], #32 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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%cmp63 = icmp sgt i32 %n, 0
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br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader:
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%0 = load i32, ptr @A, align 4
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%call0 = tail call i32 @_Z3usei(i32 %n)
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br label %for.body
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for.cond.cleanup:
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%sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
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ret i32 %sum.0.lcssa
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for.body:
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%lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
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%sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
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%call = tail call i32 @_Z3usei(i32 %0)
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%div = sdiv i32 %sum.065, %call
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%lsr.iv.next = add i32 %lsr.iv, -1
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%exitcond.not = icmp eq i32 %lsr.iv.next, 0
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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define i32 @cant_sink_successive_store(ptr nocapture readnone %store, i32 %n) {
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; CHECK-LABEL: cant_sink_successive_store:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: stp x30, x21, [sp, #-32]! // 16-byte Folded Spill
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; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset w19, -8
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; CHECK-NEXT: .cfi_offset w20, -16
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; CHECK-NEXT: .cfi_offset w21, -24
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; CHECK-NEXT: .cfi_offset w30, -32
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; CHECK-NEXT: mov w19, w1
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; CHECK-NEXT: cmp w1, #1
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; CHECK-NEXT: b.lt .LBB2_3
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; CHECK-NEXT: // %bb.1: // %for.body.preheader
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; CHECK-NEXT: adrp x8, A
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; CHECK-NEXT: mov w21, w19
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; CHECK-NEXT: ldr w20, [x8, :lo12:A]
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; CHECK-NEXT: mov w8, #42 // =0x2a
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; CHECK-NEXT: str w8, [x0]
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; CHECK-NEXT: .LBB2_2: // %for.body
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: mov w0, w20
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; CHECK-NEXT: bl _Z3usei
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; CHECK-NEXT: sdiv w21, w21, w0
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; CHECK-NEXT: subs w19, w19, #1
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; CHECK-NEXT: b.ne .LBB2_2
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; CHECK-NEXT: b .LBB2_4
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; CHECK-NEXT: .LBB2_3:
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; CHECK-NEXT: mov w21, w19
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; CHECK-NEXT: .LBB2_4: // %for.cond.cleanup
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; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: mov w0, w21
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; CHECK-NEXT: ldp x30, x21, [sp], #32 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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%cmp63 = icmp sgt i32 %n, 0
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br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader:
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%0 = load i32, ptr @A, align 4
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store i32 42, ptr %store, align 4
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br label %for.body
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for.cond.cleanup:
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%sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
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ret i32 %sum.0.lcssa
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for.body:
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%lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
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%sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
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%call = tail call i32 @_Z3usei(i32 %0)
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%div = sdiv i32 %sum.065, %call
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%lsr.iv.next = add i32 %lsr.iv, -1
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%exitcond.not = icmp eq i32 %lsr.iv.next, 0
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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declare i32 @_Z3usei(i32)
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