1782810b84
So far branch protection, sign return address, guarded control stack attributes are only emitted as module flags to indicate the functions need to be generated with those features. The problem is in case of an LTO build the module flags are merged with the `min` rule which means if one of the module is not build with sign return address then the features will be turned off for all functions. Due to the functions take the branch-protection and sign-return-address features from the module flags. The sign-return-address is function level option therefore it is expected functions from files that is compiled with -mbranch-protection=pac-ret to be protected. The inliner might inline functions with different set of flags as it doesn't consider the module flags. This patch adds the attributes to all functions and drops the checking of the module flags for the code generation. Module flag is still used for generating the ELF markers. Also drops the "true"/"false" values from the branch-protection-enforcement, branch-protection-pauth-lr, guarded-control-stack attributes as presence of the attribute means it is on absence means off and no other option. Releand with test fixes.
78 lines
1.9 KiB
LLVM
78 lines
1.9 KiB
LLVM
;; RUN: llc -mtriple=aarch64 -mattr=+v8.5a %s -o - | FileCheck %s
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declare i32 @g(i32) #5
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define i32 @f0(i32 %x) #0 {
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entry:
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%call = tail call i32 @g(i32 %x) #5
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%add = add nsw i32 %call, 1
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ret i32 %add
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}
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;; CHECK-LABEL: f0:
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;; CHECK-NOT: bti
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;; CHECK-NOT: pacia
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;; CHECK-NOT: reta
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define i32 @f1(i32 %x) #1 {
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entry:
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%call = tail call i32 @g(i32 %x) #5
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%add = add nsw i32 %call, 1
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ret i32 %add
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}
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;; CHECK-LABEL: f1:
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;; CHECK: bti c
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;; CHECK-NOT: reta
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define i32 @f2(i32 %x) #2 {
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entry:
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%call = tail call i32 @g(i32 %x) #5
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%add = add nsw i32 %call, 1
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ret i32 %add
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}
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;; CHECK-LABEL: f2:
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;; CHECK: paciasp
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;; CHECK: retaa
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define i32 @f3(i32 %x) #3 {
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entry:
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%call = tail call i32 @g(i32 %x) #5
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%add = add nsw i32 %call, 1
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ret i32 %add
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}
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;; CHECK-LABEL: f3:
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;; CHECK: pacibsp
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;; CHECK: retab
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define i32 @f4(i32 %x) #4 {
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entry:
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ret i32 1
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}
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;; CHECK-LABEL: f4:
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;; CHECK: paciasp
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;; CHECK: retaa
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define i32 @f5(i32 %x) #5 {
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entry:
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%call = tail call i32 @g(i32 %x) #5
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%add = add nsw i32 %call, 1
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ret i32 %add
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}
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;; CHECK-LABEL: f5:
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;; CHECK: paciasp
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;; CHECK: retaa
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attributes #0 = { nounwind }
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attributes #1 = { nounwind "branch-target-enforcement" }
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attributes #2 = { nounwind "sign-return-address"="non-leaf" "sign-return-address-key"="a_key" }
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attributes #3 = { nounwind "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" }
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attributes #4 = { nounwind "sign-return-address"="all" "sign-return-address-key"="a_key" }
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attributes #5 = { nounwind "sign-return-address"="non-leaf" "sign-return-address-key"="a_key" }
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!llvm.module.flags = !{!0, !1, !2, !3, !4}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 8, !"branch-target-enforcement", i32 1}
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!2 = !{i32 8, !"sign-return-address", i32 1}
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!3 = !{i32 8, !"sign-return-address-all", i32 0}
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!4 = !{i32 8, !"sign-return-address-with-bkey", i32 0}
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