74e8f29f31
`weightCalcHelper` is responsible for adding hints to MRI. Prior to this PR, we fell back on register ID as the last tie breaker for sorting hints. However, there is an opportunity to add an additional sorting characteristic: whether or not a register is a callee-saved-register. I thought of this idea because I saw that `AllocationOrder::create` calls `RegisterClassInfo::getOrder`, which returns a list of registers such that the registers which alias callee-saved-registers come last. From this, I conclude that the register allocator prefers an order such that callee-saved-registers are allocated after non-callee-saved-registers to avoid having to spill the CSR. This sorting characteristic occurs only as a tie breaker to the Weight calculation. This is a good idea since the weight calculation is pretty complex and I'm sure it is a pretty stable metric. I think its pretty reasonable to agree that whether a register is callee-saved or not is a better tie breaker than register ID. I think this is evident by the test diff, since the changes all seem to have no impact or improve the register allocation.
223 lines
5.7 KiB
LLVM
223 lines
5.7 KiB
LLVM
; RUN: llc < %s -mtriple aarch64-linux-gnu -mattr=+pauth -verify-machineinstrs -disable-post-ra \
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; RUN: -global-isel=0 -o - %s | FileCheck %s
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; RUN: llc < %s -mtriple aarch64-linux-gnu -mattr=+pauth -verify-machineinstrs -disable-post-ra \
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; RUN: -global-isel=1 -global-isel-abort=1 -o - %s | FileCheck %s
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define i32 @test() #0 {
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; CHECK-LABEL: test:
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; CHECK: %bb.0:
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; CHECK-NEXT: str x19, [sp, #-16]!
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: //APP
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; CHECK-NEXT: //NO_APP
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; CHECK-NEXT: ldr x19, [sp], #16
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; CHECK-NEXT: ret
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call void asm sideeffect "", "~{x19}"()
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ret i32 0
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}
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define i32 @test_alloca() #0 {
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; CHECK-LABEL: test_alloca:
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; CHECK: %bb.0:
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; CHECK-NEXT: sub sp, sp, #32
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; CHECK-NEXT: mov x8, sp
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: //APP
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; CHECK-NEXT: //NO_APP
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; CHECK-NEXT: add sp, sp, #32
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; CHECK-NEXT: ret
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%p = alloca i8, i32 32
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call void asm sideeffect "", "r"(ptr %p)
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ret i32 0
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}
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define i32 @test_realign_alloca() #0 {
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; CHECK-LABEL: test_realign_alloca:
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; CHECK: %bb.0:
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; CHECK-NEXT: pacibsp
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; CHECK-NEXT: stp x29, x30, [sp, #-16]!
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; CHECK-NEXT: mov x29, sp
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; CHECK-NEXT: sub x9, sp, #112
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; CHECK-NEXT: and sp, x9, #0xffffffffffffff80
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; CHECK-NEXT: mov x8, sp
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: //APP
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; CHECK-NEXT: //NO_APP
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; CHECK-NEXT: mov sp, x29
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; CHECK-NEXT: ldp x29, x30, [sp], #16
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; CHECK-NEXT: retab
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%p = alloca i8, i32 32, align 128
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call void asm sideeffect "", "r"(ptr %p)
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ret i32 0
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}
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define i32 @test_big_alloca() #0 {
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; CHECK-LABEL: test_big_alloca:
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; CHECK: %bb.0:
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; CHECK-NEXT: str x29, [sp, #-16]!
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; CHECK-NEXT: sub sp, sp, #1024
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; CHECK-NEXT: mov x8, sp
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: //APP
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; CHECK-NEXT: //NO_APP
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; CHECK-NEXT: add sp, sp, #1024
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; CHECK-NEXT: ldr x29, [sp], #16
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; CHECK-NEXT: ret
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%p = alloca i8, i32 1024
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call void asm sideeffect "", "r"(ptr %p)
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ret i32 0
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}
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define i32 @test_var_alloca(i32 %s) #0 {
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%p = alloca i8, i32 %s
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call void asm sideeffect "", "r"(ptr %p)
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ret i32 0
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}
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define i32 @test_noframe_saved(ptr %p) #0 {
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; CHECK-LABEL: test_noframe_saved:
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; CHECK: %bb.0:
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; CHECK-NEXT: str x29, [sp, #-96]!
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; CHECK-NEXT: stp x28, x27, [sp, #16]
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; CHECK-NEXT: stp x26, x25, [sp, #32]
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; CHECK-NEXT: stp x24, x23, [sp, #48]
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; CHECK-NEXT: stp x22, x21, [sp, #64]
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; CHECK-NEXT: stp x20, x19, [sp, #80]
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; CHECK-NEXT: ldr w29, [x0]
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; CHECK-NEXT: //APP
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; CHECK-NEXT: //NO_APP
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; CHECK-NEXT: mov w0, w29
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; CHECK-NEXT: ldp x20, x19, [sp, #80]
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; CHECK-NEXT: ldp x22, x21, [sp, #64]
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; CHECK-NEXT: ldp x24, x23, [sp, #48]
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; CHECK-NEXT: ldp x26, x25, [sp, #32]
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; CHECK-NEXT: ldp x28, x27, [sp, #16]
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; CHECK-NEXT: ldr x29, [sp], #96
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; CHECK-NEXT: ret
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%v = load i32, ptr %p
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call void asm sideeffect "", "~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15},~{x16},~{x17},~{x18},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28}"()
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ret i32 %v
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}
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define void @test_noframe() #0 {
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; CHECK-LABEL: test_noframe:
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; CHECK: %bb.0:
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; CHECK-NEXT: ret
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ret void
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}
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; FIXME: Inefficient lowering of @llvm.returnaddress
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define ptr @test_returnaddress_0() #0 {
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; CHECK-LABEL: test_returnaddress_0:
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; CHECK: %bb.0:
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; CHECK-NEXT: mov x0, x30
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; CHECK-NEXT: xpaci x0
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; CHECK-NEXT: ret
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%r = call ptr @llvm.returnaddress(i32 0)
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ret ptr %r
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}
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define ptr @test_returnaddress_1() #0 {
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; CHECK-LABEL: test_returnaddress_1:
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; CHECK: %bb.0:
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; CHECK-NEXT: pacibsp
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; CHECK-NEXT: stp x29, x30, [sp, #-16]!
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; CHECK-NEXT: mov x29, sp
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; CHECK-NEXT: ldr x8, [x29]
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; CHECK-NEXT: ldr x0, [x8, #8]
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; CHECK-NEXT: xpaci x0
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; CHECK-NEXT: ldp x29, x30, [sp], #16
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; CHECK-NEXT: retab
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%r = call ptr @llvm.returnaddress(i32 1)
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ret ptr %r
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}
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define void @test_noframe_alloca() #0 {
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; CHECK-LABEL: test_noframe_alloca:
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; CHECK: %bb.0:
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: add x8, sp, #12
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; CHECK-NEXT: //APP
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; CHECK-NEXT: //NO_APP
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; CHECK-NEXT: add sp, sp, #16
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; CHECK-NEXT: ret
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%p = alloca i8, i32 1
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call void asm sideeffect "", "r"(ptr %p)
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ret void
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}
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define void @test_call() #0 {
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; CHECK-LABEL: test_call:
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; CHECK: %bb.0:
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; CHECK-NEXT: pacibsp
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; CHECK-NEXT: str x30, [sp, #-16]!
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; CHECK-NEXT: bl bar
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; CHECK-NEXT: ldr x30, [sp], #16
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; CHECK-NEXT: retab
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call i32 @bar()
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ret void
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}
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define void @test_call_alloca() #0 {
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; CHECK-LABEL: test_call_alloca:
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; CHECK: %bb.0:
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; CHECK-NEXT: pacibsp
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; CHECK-NEXT: str x30, [sp, #-16]
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; CHECK-NEXT: bl bar
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; CHECK-NEXT: ldr x30, [sp], #16
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; CHECK-NEXT: retab
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alloca i8
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call i32 @bar()
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ret void
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}
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define void @test_call_shrinkwrapping(i1 %c) #0 {
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; CHECK-LABEL: test_call_shrinkwrapping:
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; CHECK: %bb.0:
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; CHECK-NEXT: tbz w0, #0, .LBB12_2
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; CHECK-NEXT: %bb.1:
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; CHECK-NEXT: pacibsp
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; CHECK-NEXT: str x30, [sp, #-16]!
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; CHECK-NEXT: bl bar
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; CHECK-NEXT: ldr x30, [sp], #16
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; CHECK-NEXT: autibsp
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; CHECK-NEXT: LBB12_2:
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; CHECK-NEXT: ret
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br i1 %c, label %tbb, label %fbb
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tbb:
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call i32 @bar()
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br label %fbb
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fbb:
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ret void
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}
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define i32 @test_tailcall() #0 {
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; CHECK-LABEL: test_tailcall:
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; CHECK: %bb.0:
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; CHECK-NEXT: pacibsp
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; CHECK-NEXT: str x30, [sp, #-16]!
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; CHECK-NEXT: bl bar
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; CHECK-NEXT: ldr x30, [sp], #16
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; CHECK-NEXT: autibsp
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; CHECK-NEXT: b bar
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call i32 @bar()
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%c = tail call i32 @bar()
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ret i32 %c
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}
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define i32 @test_tailcall_noframe() #0 {
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; CHECK-LABEL: test_tailcall_noframe:
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; CHECK: %bb.0:
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; CHECK-NEXT: b bar
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%c = tail call i32 @bar()
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ret i32 %c
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}
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declare i32 @bar()
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declare ptr @llvm.returnaddress(i32)
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attributes #0 = { nounwind "ptrauth-returns" }
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