61510b51c3
This reverts commit 9c319d5bb40785c969d2af76535ca62448dfafa7. Some issues were discovered with the bootstrap builds, which seem like they were caused by this commit. I'm reverting to investigate.
102 lines
3.3 KiB
LLVM
102 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
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; FADD
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define double @fadda_nxv8f64(double %init, <vscale x 8 x double> %a) {
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; CHECK-LABEL: fadda_nxv8f64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
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; CHECK-NEXT: fadda d0, p0, d0, z1.d
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; CHECK-NEXT: fadda d0, p0, d0, z2.d
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; CHECK-NEXT: fadda d0, p0, d0, z3.d
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; CHECK-NEXT: fadda d0, p0, d0, z4.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = call double @llvm.vector.reduce.fadd.nxv8f64(double %init, <vscale x 8 x double> %a)
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ret double %res
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}
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; FADDV
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define float @faddv_nxv8f32(float %init, <vscale x 8 x float> %a) {
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; CHECK-LABEL: faddv_nxv8f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fadd z1.s, z1.s, z2.s
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: faddv s1, p0, z1.s
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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%res = call fast float @llvm.vector.reduce.fadd.nxv8f32(float %init, <vscale x 8 x float> %a)
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ret float %res
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}
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; FMAXNMV
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define double @fmaxv_nxv8f64(<vscale x 8 x double> %a) {
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; CHECK-LABEL: fmaxv_nxv8f64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fmaxnm z1.d, p0/m, z1.d, z3.d
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; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, z2.d
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; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, z1.d
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; CHECK-NEXT: fmaxnmv d0, p0, z0.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = call double @llvm.vector.reduce.fmax.nxv8f64(<vscale x 8 x double> %a)
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ret double %res
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}
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; FMINNMV
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define half @fminv_nxv16f16(<vscale x 16 x half> %a) {
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; CHECK-LABEL: fminv_nxv16f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.h
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; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, z1.h
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; CHECK-NEXT: fminnmv h0, p0, z0.h
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; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0
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; CHECK-NEXT: ret
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%res = call half @llvm.vector.reduce.fmin.nxv16f16(<vscale x 16 x half> %a)
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ret half %res
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}
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; FMAXV
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define double @fmaximumv_nxv8f64(<vscale x 8 x double> %a) {
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; CHECK-LABEL: fmaximumv_nxv8f64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fmax z1.d, p0/m, z1.d, z3.d
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; CHECK-NEXT: fmax z0.d, p0/m, z0.d, z2.d
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; CHECK-NEXT: fmax z0.d, p0/m, z0.d, z1.d
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; CHECK-NEXT: fmaxv d0, p0, z0.d
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
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; CHECK-NEXT: ret
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%res = call double @llvm.vector.reduce.fmaximum.nxv8f64(<vscale x 8 x double> %a)
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ret double %res
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}
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; FMINV
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define half @fminimumv_nxv16f16(<vscale x 16 x half> %a) {
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; CHECK-LABEL: fminimumv_nxv16f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.h
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; CHECK-NEXT: fmin z0.h, p0/m, z0.h, z1.h
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; CHECK-NEXT: fminv h0, p0, z0.h
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; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0
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; CHECK-NEXT: ret
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%res = call half @llvm.vector.reduce.fminimum.nxv16f16(<vscale x 16 x half> %a)
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ret half %res
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}
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declare double @llvm.vector.reduce.fadd.nxv8f64(double, <vscale x 8 x double>)
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declare float @llvm.vector.reduce.fadd.nxv8f32(float, <vscale x 8 x float>)
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declare double @llvm.vector.reduce.fmax.nxv8f64(<vscale x 8 x double>)
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declare half @llvm.vector.reduce.fmin.nxv16f16(<vscale x 16 x half>)
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declare double @llvm.vector.reduce.fmaximum.nxv8f64(<vscale x 8 x double>)
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declare half @llvm.vector.reduce.fminimum.nxv16f16(<vscale x 16 x half>)
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