ff5fa711b3
The main change in this patch is we go from emitting the expression: @ cfa - NumBytes - NumScalableBytes * VG To: @ cfa - VG * NumScalableBytes - NumBytes That is, VG is the first expression. This is for a future patch that adds an alternative way to resolve VG (which uses the CFA, so it is convenient for the CFA to be at the top of the stack). Since doing this is fairly churn-heavy, I took the opportunity to also save up to 4-bytes per SVE CFI expression. This is done by folding LEB128 constants to literals when in the range 0 to 31, and using the offset in `DW_OP_breg*` expressions.
182 lines
6.8 KiB
LLVM
182 lines
6.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
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; INSERT VECTOR ELT
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define <vscale x 8 x i8> @promote_insert_8i8(<vscale x 8 x i8> %a, i8 %elt, i64 %idx) {
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; CHECK-LABEL: promote_insert_8i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: index z1.h, #0, #1
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; CHECK-NEXT: mov z2.h, w1
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; CHECK-NEXT: ptrue p0.h
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; CHECK-NEXT: cmpeq p0.h, p0/z, z1.h, z2.h
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; CHECK-NEXT: mov z0.h, p0/m, w0
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; CHECK-NEXT: ret
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%ins = insertelement <vscale x 8 x i8> %a, i8 %elt, i64 %idx
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ret <vscale x 8 x i8> %ins
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}
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define <vscale x 32 x i8> @split_insert_32i8_idx(<vscale x 32 x i8> %a, i8 %elt, i64 %idx) {
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; CHECK-LABEL: split_insert_32i8_idx:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
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; CHECK-NEXT: addvl sp, sp, #-2
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; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x40, 0x1e, 0x22 // sp + 16 + 16 * VG
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; CHECK-NEXT: .cfi_offset w29, -16
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; CHECK-NEXT: rdvl x8, #2
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; CHECK-NEXT: mov x9, sp
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; CHECK-NEXT: str z1, [sp, #1, mul vl]
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; CHECK-NEXT: sub x8, x8, #1
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; CHECK-NEXT: str z0, [sp]
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; CHECK-NEXT: cmp x1, x8
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; CHECK-NEXT: csel x8, x1, x8, lo
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; CHECK-NEXT: strb w0, [x9, x8]
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; CHECK-NEXT: ldr z0, [sp]
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; CHECK-NEXT: ldr z1, [sp, #1, mul vl]
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; CHECK-NEXT: addvl sp, sp, #2
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; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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%ins = insertelement <vscale x 32 x i8> %a, i8 %elt, i64 %idx
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ret <vscale x 32 x i8> %ins
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}
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define <vscale x 8 x float> @split_insert_8f32_idx(<vscale x 8 x float> %a, float %elt, i64 %idx) {
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; CHECK-LABEL: split_insert_8f32_idx:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
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; CHECK-NEXT: addvl sp, sp, #-2
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; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x40, 0x1e, 0x22 // sp + 16 + 16 * VG
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; CHECK-NEXT: .cfi_offset w29, -16
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; CHECK-NEXT: cnth x8
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; CHECK-NEXT: mov x9, sp
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; CHECK-NEXT: str z1, [sp, #1, mul vl]
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; CHECK-NEXT: sub x8, x8, #1
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; CHECK-NEXT: str z0, [sp]
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; CHECK-NEXT: cmp x0, x8
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; CHECK-NEXT: csel x8, x0, x8, lo
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; CHECK-NEXT: str s2, [x9, x8, lsl #2]
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; CHECK-NEXT: ldr z0, [sp]
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; CHECK-NEXT: ldr z1, [sp, #1, mul vl]
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; CHECK-NEXT: addvl sp, sp, #2
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; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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%ins = insertelement <vscale x 8 x float> %a, float %elt, i64 %idx
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ret <vscale x 8 x float> %ins
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}
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define <vscale x 8 x i64> @split_insert_8i64_idx(<vscale x 8 x i64> %a, i64 %elt, i64 %idx) {
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; CHECK-LABEL: split_insert_8i64_idx:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
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; CHECK-NEXT: addvl sp, sp, #-4
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; CHECK-NEXT: .cfi_escape 0x0f, 0x09, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x20, 0x1e, 0x22 // sp + 16 + 32 * VG
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; CHECK-NEXT: .cfi_offset w29, -16
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; CHECK-NEXT: cnth x8
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; CHECK-NEXT: mov x9, sp
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; CHECK-NEXT: str z3, [sp, #3, mul vl]
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; CHECK-NEXT: sub x8, x8, #1
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; CHECK-NEXT: str z2, [sp, #2, mul vl]
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; CHECK-NEXT: cmp x1, x8
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; CHECK-NEXT: str z1, [sp, #1, mul vl]
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; CHECK-NEXT: csel x8, x1, x8, lo
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; CHECK-NEXT: str z0, [sp]
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; CHECK-NEXT: str x0, [x9, x8, lsl #3]
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; CHECK-NEXT: ldr z0, [sp]
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; CHECK-NEXT: ldr z1, [sp, #1, mul vl]
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; CHECK-NEXT: ldr z2, [sp, #2, mul vl]
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; CHECK-NEXT: ldr z3, [sp, #3, mul vl]
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; CHECK-NEXT: addvl sp, sp, #4
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; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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%ins = insertelement <vscale x 8 x i64> %a, i64 %elt, i64 %idx
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ret <vscale x 8 x i64> %ins
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}
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; INSERT VECTOR ELT, CONSTANT IDX
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define <vscale x 4 x i16> @promote_insert_4i16(<vscale x 4 x i16> %a, i16 %elt) {
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; CHECK-LABEL: promote_insert_4i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #5 // =0x5
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; CHECK-NEXT: index z1.s, #0, #1
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: mov z2.s, w8
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; CHECK-NEXT: cmpeq p0.s, p0/z, z1.s, z2.s
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; CHECK-NEXT: mov z0.s, p0/m, w0
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; CHECK-NEXT: ret
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%ins = insertelement <vscale x 4 x i16> %a, i16 %elt, i64 5
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ret <vscale x 4 x i16> %ins
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}
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; In this test, the index is small enough that we know it will be in the
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; low half of the vector and there is no need to go through the stack as
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; done in the remaining tests
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define <vscale x 32 x i8> @split_insert_32i8(<vscale x 32 x i8> %a, i8 %elt) {
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; CHECK-LABEL: split_insert_32i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #3 // =0x3
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; CHECK-NEXT: index z2.b, #0, #1
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; CHECK-NEXT: ptrue p0.b
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; CHECK-NEXT: mov z3.b, w8
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; CHECK-NEXT: cmpeq p0.b, p0/z, z2.b, z3.b
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; CHECK-NEXT: mov z0.b, p0/m, w0
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; CHECK-NEXT: ret
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%ins = insertelement <vscale x 32 x i8> %a, i8 %elt, i64 3
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ret <vscale x 32 x i8> %ins
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}
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define <vscale x 32 x i16> @split_insert_32i16(<vscale x 32 x i16> %a, i16 %elt) {
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; CHECK-LABEL: split_insert_32i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
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; CHECK-NEXT: addvl sp, sp, #-4
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; CHECK-NEXT: .cfi_escape 0x0f, 0x09, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x20, 0x1e, 0x22 // sp + 16 + 32 * VG
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; CHECK-NEXT: .cfi_offset w29, -16
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; CHECK-NEXT: rdvl x8, #2
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; CHECK-NEXT: mov w9, #128 // =0x80
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; CHECK-NEXT: str z3, [sp, #3, mul vl]
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; CHECK-NEXT: sub x8, x8, #1
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; CHECK-NEXT: str z2, [sp, #2, mul vl]
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; CHECK-NEXT: cmp x8, #128
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; CHECK-NEXT: str z1, [sp, #1, mul vl]
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; CHECK-NEXT: csel x8, x8, x9, lo
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; CHECK-NEXT: mov x9, sp
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; CHECK-NEXT: str z0, [sp]
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; CHECK-NEXT: strh w0, [x9, x8, lsl #1]
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; CHECK-NEXT: ldr z0, [sp]
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; CHECK-NEXT: ldr z1, [sp, #1, mul vl]
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; CHECK-NEXT: ldr z2, [sp, #2, mul vl]
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; CHECK-NEXT: ldr z3, [sp, #3, mul vl]
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; CHECK-NEXT: addvl sp, sp, #4
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; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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%ins = insertelement <vscale x 32 x i16> %a, i16 %elt, i64 128
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ret <vscale x 32 x i16> %ins
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}
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define <vscale x 8 x i32> @split_insert_8i32(<vscale x 8 x i32> %a, i32 %elt) {
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; CHECK-LABEL: split_insert_8i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
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; CHECK-NEXT: addvl sp, sp, #-2
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; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x40, 0x1e, 0x22 // sp + 16 + 16 * VG
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; CHECK-NEXT: .cfi_offset w29, -16
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; CHECK-NEXT: cnth x8
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; CHECK-NEXT: mov w9, #16960 // =0x4240
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; CHECK-NEXT: str z1, [sp, #1, mul vl]
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; CHECK-NEXT: movk w9, #15, lsl #16
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; CHECK-NEXT: sub x8, x8, #1
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; CHECK-NEXT: str z0, [sp]
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; CHECK-NEXT: cmp x8, x9
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; CHECK-NEXT: csel x8, x8, x9, lo
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; CHECK-NEXT: mov x9, sp
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; CHECK-NEXT: str w0, [x9, x8, lsl #2]
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; CHECK-NEXT: ldr z0, [sp]
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; CHECK-NEXT: ldr z1, [sp, #1, mul vl]
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; CHECK-NEXT: addvl sp, sp, #2
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; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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%ins = insertelement <vscale x 8 x i32> %a, i32 %elt, i64 1000000
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ret <vscale x 8 x i32> %ins
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}
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