fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
136 lines
5.9 KiB
LLVM
136 lines
5.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck --check-prefixes=GFX9-NO-BACKOFF %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck --check-prefixes=GFX9-BACKOFF %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 < %s | FileCheck --check-prefixes=GFX942-BACKOFF %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -mattr=-back-off-barrier < %s | FileCheck --check-prefixes=GFX9-NO-BACKOFF %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 < %s | FileCheck --check-prefixes=GFX10-BACKOFF %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck --check-prefixes=GFX11-BACKOFF %s
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; Subtargets must wait for outstanding memory instructions before a barrier if
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; they cannot back off of the barrier.
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define void @back_off_barrier_no_fence(ptr %in, ptr %out) #0 {
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; GFX9-NO-BACKOFF-LABEL: back_off_barrier_no_fence:
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; GFX9-NO-BACKOFF: ; %bb.0:
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; GFX9-NO-BACKOFF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NO-BACKOFF-NEXT: flat_load_dword v0, v[0:1]
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; GFX9-NO-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX9-NO-BACKOFF-NEXT: s_barrier
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; GFX9-NO-BACKOFF-NEXT: flat_store_dword v[2:3], v0
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; GFX9-NO-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX9-NO-BACKOFF-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-BACKOFF-LABEL: back_off_barrier_no_fence:
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; GFX9-BACKOFF: ; %bb.0:
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; GFX9-BACKOFF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-BACKOFF-NEXT: flat_load_dword v0, v[0:1]
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; GFX9-BACKOFF-NEXT: s_barrier
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; GFX9-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX9-BACKOFF-NEXT: flat_store_dword v[2:3], v0
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; GFX9-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX9-BACKOFF-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX942-BACKOFF-LABEL: back_off_barrier_no_fence:
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; GFX942-BACKOFF: ; %bb.0:
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; GFX942-BACKOFF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX942-BACKOFF-NEXT: flat_load_dword v0, v[0:1]
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; GFX942-BACKOFF-NEXT: s_barrier
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; GFX942-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX942-BACKOFF-NEXT: flat_store_dword v[2:3], v0
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; GFX942-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX942-BACKOFF-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-BACKOFF-LABEL: back_off_barrier_no_fence:
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; GFX10-BACKOFF: ; %bb.0:
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; GFX10-BACKOFF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-BACKOFF-NEXT: flat_load_dword v0, v[0:1]
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; GFX10-BACKOFF-NEXT: s_barrier
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; GFX10-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX10-BACKOFF-NEXT: flat_store_dword v[2:3], v0
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; GFX10-BACKOFF-NEXT: s_waitcnt lgkmcnt(0)
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; GFX10-BACKOFF-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-BACKOFF-LABEL: back_off_barrier_no_fence:
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; GFX11-BACKOFF: ; %bb.0:
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; GFX11-BACKOFF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-BACKOFF-NEXT: flat_load_b32 v0, v[0:1]
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; GFX11-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX11-BACKOFF-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX11-BACKOFF-NEXT: s_barrier
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; GFX11-BACKOFF-NEXT: flat_store_b32 v[2:3], v0
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; GFX11-BACKOFF-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-BACKOFF-NEXT: s_setpc_b64 s[30:31]
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%load = load i32, ptr %in
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call void @llvm.amdgcn.s.barrier()
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store i32 %load, ptr %out
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ret void
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}
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define void @back_off_barrier_with_fence(ptr %in, ptr %out) #0 {
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; GFX9-NO-BACKOFF-LABEL: back_off_barrier_with_fence:
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; GFX9-NO-BACKOFF: ; %bb.0:
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; GFX9-NO-BACKOFF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NO-BACKOFF-NEXT: flat_load_dword v0, v[0:1]
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; GFX9-NO-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX9-NO-BACKOFF-NEXT: s_barrier
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; GFX9-NO-BACKOFF-NEXT: flat_store_dword v[2:3], v0
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; GFX9-NO-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX9-NO-BACKOFF-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-BACKOFF-LABEL: back_off_barrier_with_fence:
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; GFX9-BACKOFF: ; %bb.0:
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; GFX9-BACKOFF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-BACKOFF-NEXT: flat_load_dword v0, v[0:1]
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; GFX9-BACKOFF-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9-BACKOFF-NEXT: s_barrier
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; GFX9-BACKOFF-NEXT: s_waitcnt vmcnt(0)
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; GFX9-BACKOFF-NEXT: flat_store_dword v[2:3], v0
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; GFX9-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX9-BACKOFF-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX942-BACKOFF-LABEL: back_off_barrier_with_fence:
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; GFX942-BACKOFF: ; %bb.0:
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; GFX942-BACKOFF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX942-BACKOFF-NEXT: flat_load_dword v0, v[0:1]
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; GFX942-BACKOFF-NEXT: s_waitcnt lgkmcnt(0)
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; GFX942-BACKOFF-NEXT: s_barrier
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; GFX942-BACKOFF-NEXT: s_waitcnt vmcnt(0)
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; GFX942-BACKOFF-NEXT: flat_store_dword v[2:3], v0
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; GFX942-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX942-BACKOFF-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-BACKOFF-LABEL: back_off_barrier_with_fence:
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; GFX10-BACKOFF: ; %bb.0:
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; GFX10-BACKOFF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-BACKOFF-NEXT: flat_load_dword v0, v[0:1]
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; GFX10-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX10-BACKOFF-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX10-BACKOFF-NEXT: s_barrier
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; GFX10-BACKOFF-NEXT: buffer_gl0_inv
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; GFX10-BACKOFF-NEXT: flat_store_dword v[2:3], v0
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; GFX10-BACKOFF-NEXT: s_waitcnt lgkmcnt(0)
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; GFX10-BACKOFF-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-BACKOFF-LABEL: back_off_barrier_with_fence:
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; GFX11-BACKOFF: ; %bb.0:
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; GFX11-BACKOFF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-BACKOFF-NEXT: flat_load_b32 v0, v[0:1]
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; GFX11-BACKOFF-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX11-BACKOFF-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX11-BACKOFF-NEXT: s_barrier
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; GFX11-BACKOFF-NEXT: buffer_gl0_inv
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; GFX11-BACKOFF-NEXT: flat_store_b32 v[2:3], v0
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; GFX11-BACKOFF-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-BACKOFF-NEXT: s_setpc_b64 s[30:31]
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%load = load i32, ptr %in
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fence syncscope("workgroup") release
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call void @llvm.amdgcn.s.barrier()
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fence syncscope("workgroup") acquire
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store i32 %load, ptr %out
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ret void
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}
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declare void @llvm.amdgcn.s.barrier()
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attributes #0 = { nounwind }
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