fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
213 lines
11 KiB
LLVM
213 lines
11 KiB
LLVM
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn < %s | FileCheck -check-prefixes=FUNC,GCN,FMA_F64 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefixes=FUNC,GCN,FMA_F64 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx90a -mattr=-flat-for-global < %s | FileCheck -check-prefixes=FUNC,GCN,FMAC_F64 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=FUNC,GCN,FMA_F64 %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1250 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=FUNC,GCN,FMAC_F64 %s
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declare double @llvm.fma.f64(double, double, double) nounwind readnone
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declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) nounwind readnone
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declare <4 x double> @llvm.fma.v4f64(<4 x double>, <4 x double>, <4 x double>) nounwind readnone
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declare double @llvm.fabs.f64(double) nounwind readnone
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; FUNC-LABEL: {{^}}fma_f64:
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; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fma_f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r0 = load double, ptr addrspace(1) %in1
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%r1 = load double, ptr addrspace(1) %in2
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%r2 = load double, ptr addrspace(1) %in3
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%r3 = tail call double @llvm.fma.f64(double %r0, double %r1, double %r2)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_v2f64:
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; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fma_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r0 = load <2 x double>, ptr addrspace(1) %in1
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%r1 = load <2 x double>, ptr addrspace(1) %in2
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%r2 = load <2 x double>, ptr addrspace(1) %in3
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%r3 = tail call <2 x double> @llvm.fma.v2f64(<2 x double> %r0, <2 x double> %r1, <2 x double> %r2)
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store <2 x double> %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_v4f64:
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; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fma_v4f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r0 = load <4 x double>, ptr addrspace(1) %in1
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%r1 = load <4 x double>, ptr addrspace(1) %in2
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%r2 = load <4 x double>, ptr addrspace(1) %in3
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%r3 = tail call <4 x double> @llvm.fma.v4f64(<4 x double> %r0, <4 x double> %r1, <4 x double> %r2)
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store <4 x double> %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_f64_abs_src0:
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; GCN: v_fma_f64 {{v\[[0-9]+:[0-9]+\], |v\[[0-9]+:[0-9]+\]|, v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fma_f64_abs_src0(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r0 = load double, ptr addrspace(1) %in1
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%r1 = load double, ptr addrspace(1) %in2
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%r2 = load double, ptr addrspace(1) %in3
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%fabs = call double @llvm.fabs.f64(double %r0)
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%r3 = tail call double @llvm.fma.f64(double %fabs, double %r1, double %r2)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_f64_abs_src1:
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; GCN: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], \|v\[[0-9]+:[0-9]+\]\|, v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fma_f64_abs_src1(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r0 = load double, ptr addrspace(1) %in1
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%r1 = load double, ptr addrspace(1) %in2
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%r2 = load double, ptr addrspace(1) %in3
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%fabs = call double @llvm.fabs.f64(double %r1)
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%r3 = tail call double @llvm.fma.f64(double %r0, double %fabs, double %r2)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_f64_abs_src2:
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; GCN: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], \|v\[[0-9]+:[0-9]+\]\|}}
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define amdgpu_kernel void @fma_f64_abs_src2(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r0 = load double, ptr addrspace(1) %in1
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%r1 = load double, ptr addrspace(1) %in2
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%r2 = load double, ptr addrspace(1) %in3
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%fabs = call double @llvm.fabs.f64(double %r2)
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%r3 = tail call double @llvm.fma.f64(double %r0, double %r1, double %fabs)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_f64_neg_src0:
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; GCN: v_fma_f64 {{v\[[0-9]+:[0-9]+\], -v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fma_f64_neg_src0(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r0 = load double, ptr addrspace(1) %in1
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%r1 = load double, ptr addrspace(1) %in2
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%r2 = load double, ptr addrspace(1) %in3
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%fsub = fsub double -0.000000e+00, %r0
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%r3 = tail call double @llvm.fma.f64(double %fsub, double %r1, double %r2)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_f64_neg_src1:
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; GCN: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], -v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fma_f64_neg_src1(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r0 = load double, ptr addrspace(1) %in1
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%r1 = load double, ptr addrspace(1) %in2
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%r2 = load double, ptr addrspace(1) %in3
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%fsub = fsub double -0.000000e+00, %r1
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%r3 = tail call double @llvm.fma.f64(double %r0, double %fsub, double %r2)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_f64_neg_src2:
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; GCN: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], -v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fma_f64_neg_src2(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r0 = load double, ptr addrspace(1) %in1
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%r1 = load double, ptr addrspace(1) %in2
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%r2 = load double, ptr addrspace(1) %in3
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%fsub = fsub double -0.000000e+00, %r2
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%r3 = tail call double @llvm.fma.f64(double %r0, double %r1, double %fsub)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_f64_abs_neg_src0:
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; GCN: v_fma_f64 {{v\[[0-9]+:[0-9]+\], -\|v\[[0-9]+:[0-9]+\]\|, v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fma_f64_abs_neg_src0(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r0 = load double, ptr addrspace(1) %in1
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%r1 = load double, ptr addrspace(1) %in2
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%r2 = load double, ptr addrspace(1) %in3
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%fabs = call double @llvm.fabs.f64(double %r0)
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%fsub = fsub double -0.000000e+00, %fabs
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%r3 = tail call double @llvm.fma.f64(double %fsub, double %r1, double %r2)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_f64_abs_neg_src1:
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; GCN: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], -\|v\[[0-9]+:[0-9]+\]\|, v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fma_f64_abs_neg_src1(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r0 = load double, ptr addrspace(1) %in1
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%r1 = load double, ptr addrspace(1) %in2
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%r2 = load double, ptr addrspace(1) %in3
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%fabs = call double @llvm.fabs.f64(double %r1)
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%fsub = fsub double -0.000000e+00, %fabs
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%r3 = tail call double @llvm.fma.f64(double %r0, double %fsub, double %r2)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_f64_abs_neg_src2:
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; GCN: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], -\|v\[[0-9]+:[0-9]+\]\|}}
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define amdgpu_kernel void @fma_f64_abs_neg_src2(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r0 = load double, ptr addrspace(1) %in1
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%r1 = load double, ptr addrspace(1) %in2
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%r2 = load double, ptr addrspace(1) %in3
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%fabs = call double @llvm.fabs.f64(double %r2)
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%fsub = fsub double -0.000000e+00, %fabs
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%r3 = tail call double @llvm.fma.f64(double %r0, double %r1, double %fsub)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_f64_lit_src0:
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; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
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; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fma_f64_lit_src0(ptr addrspace(1) %out,
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ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
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%r1 = load double, ptr addrspace(1) %in2
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%r2 = load double, ptr addrspace(1) %in3
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%r3 = tail call double @llvm.fma.f64(double +2.0, double %r1, double %r2)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_f64_lit_src1:
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; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
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; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fma_f64_lit_src1(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in3) {
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%r0 = load double, ptr addrspace(1) %in1
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%r2 = load double, ptr addrspace(1) %in3
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%r3 = tail call double @llvm.fma.f64(double %r0, double +2.0, double %r2)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fma_f64_lit_src2:
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; GCN: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0}}
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define amdgpu_kernel void @fma_f64_lit_src2(ptr addrspace(1) %out, ptr addrspace(1) %in1,
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ptr addrspace(1) %in2) {
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%r0 = load double, ptr addrspace(1) %in1
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%r1 = load double, ptr addrspace(1) %in2
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%r3 = tail call double @llvm.fma.f64(double %r0, double %r1, double +2.0)
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store double %r3, ptr addrspace(1) %out
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ret void
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}
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