fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
31 lines
1.3 KiB
LLVM
31 lines
1.3 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=gfx908 < %s | FileCheck -check-prefix=GCN %s
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; Check that we do not use AGPRs for v32i32 type
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; GCN-LABEL: {{^}}test_v1024:
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; GCN-NOT: v_accvgpr
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; GCN-COUNT-8: global_store_dwordx4
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; GCN-NOT: v_accvgpr
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define amdgpu_kernel void @test_v1024(i1 %c0) {
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entry:
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%alloca = alloca <32 x i32>, align 16, addrspace(5)
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call void @llvm.memset.p5.i32(ptr addrspace(5) %alloca, i8 0, i32 128, i1 false)
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br i1 %c0, label %if.then.i.i, label %if.else.i
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if.then.i.i: ; preds = %entry
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call void @llvm.memcpy.p5.p5.i64(ptr addrspace(5) align 16 %alloca, ptr addrspace(5) align 4 poison, i64 128, i1 false)
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br label %if.then.i62.i
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if.else.i: ; preds = %entry
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br label %if.then.i62.i
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if.then.i62.i: ; preds = %if.else.i, %if.then.i.i
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call void @llvm.memcpy.p1.p5.i64(ptr addrspace(1) align 4 poison, ptr addrspace(5) align 16 %alloca, i64 128, i1 false)
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ret void
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}
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declare void @llvm.memset.p5.i32(ptr addrspace(5) nocapture readonly, i8, i32, i1 immarg)
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declare void @llvm.memcpy.p5.p5.i64(ptr addrspace(5) nocapture writeonly, ptr addrspace(5) nocapture readonly, i64, i1 immarg)
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declare void @llvm.memcpy.p1.p5.i64(ptr addrspace(1) nocapture writeonly, ptr addrspace(5) nocapture readonly, i64, i1 immarg)
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