50320504c8
FPSCR and FPEXC will be stored in FPStatusRegs, after GPRCS2 has been saved. - GPRCS1 - GPRCS2 - FPStatusRegs (new) - DPRCS - GPRCS3 - DPRCS2 FPSCR is present on all targets with a VFP, but the FPEXC register is not present on Cortex-M devices, so different amounts of bytes are being pushed onto the stack depending on our target, which would affect alignment for subsequent saves. DPRCS1 will sum up all previous bytes that were saved, and will emit extra instructions to ensure that its alignment is correct. My assumption is that if DPRCS1 is able to correct its alignment to be correct, then all subsequent saves will also have correct alignment. Avoid annotating the saving of FPSCR and FPEXC for functions marked with the interrupt_save_fp attribute, even though this is done as part of frame setup. Since these are status registers, there really is no viable way of annotating this. Since these aren't GPRs or DPRs, they can't be used with .save or .vsave directives. Instead, just record that the intermediate registers r4 and r5 are saved to the stack again. Co-authored-by: Jake Vossen <jake@vossen.dev> Co-authored-by: Alan Phipps <a-phipps@ti.com>
280 lines
16 KiB
YAML
280 lines
16 KiB
YAML
# RUN: llc -mtriple=armv7-none-none-eabihf -mcpu=cortex-r5 -o - %s -run-pass=prologepilog \
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# RUN: | FileCheck --check-prefix=CHECK-R-ARM %s
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# RUN: llc -mtriple=armv7-none-none-eabihf -mcpu=cortex-r4 -o - %s -run-pass=prologepilog \
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# RUN: | FileCheck --check-prefix=CHECK-R-ARM %s
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# RUN: llc -mtriple=thumbv7-none-none-eabihf -mcpu=cortex-r5 -o - %s -run-pass=prologepilog \
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# RUN: | FileCheck --check-prefix=CHECK-R-THUMB %s
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# RUN: llc -mtriple=thumbv7-none-none-eabihf -mcpu=cortex-r4 -o - %s -run-pass=prologepilog \
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# RUN: | FileCheck --check-prefix=CHECK-R-THUMB %s
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# RUN: llc -mtriple=thumbv7-none-none-eabihf -mcpu=cortex-m3 -o - %s -run-pass=prologepilog \
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# RUN: | FileCheck --check-prefix=CHECK-M-THUMB %s
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# RUN: llc -mtriple=thumbv7-none-none-eabihf -mcpu=cortex-m4 -o - %s -run-pass=prologepilog \
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# RUN: | FileCheck --check-prefix=CHECK-M-THUMB %s
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# RUN: llc -mtriple=thumbv8-none-none-eabihf -mcpu=cortex-m33 -o - %s -run-pass=prologepilog \
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# RUN: | FileCheck --check-prefix=CHECK-M-THUMB %s
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# =============================================================================
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# ============================ cortex-r arm-mode ==============================
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# =============================================================================
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# This IRQ will save 104 bytes:
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#
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# |---------+------+----------|
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# | reg | size | zone |
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# |---------+------+----------|
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# | LR | 4x1 | GPR |
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# | R12-R10 | 4x3 | |
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# | R5-R0 | 4x6 | |
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# |---------+------+----------|
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# | FPEXC | 4x1 | FPStatus |
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# | FPSCR | 4x1 | |
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# |---------+------+----------|
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# | D7-D0 | 8x8 | FPRegs |
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# |---------+------+----------|
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# | | 112 | |
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# |---------+------+----------|
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#
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# ================================= Prologue =================================
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#
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# Frame pointer (r11) will be store at $original_sp - 12, but we can't save the
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# FP until after we save the GPR zone of registers. The GPR zone of registers
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# moves the stack by 40 bytes. So $original_sp = $current_sp + 40. Thus,
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# $current_sp + 40 - 12 = $current_sp + 28. Thus, we see the instruction:
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#
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# $r11 = ADDri $sp, 28
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#
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# We don't have dwarf information for the FPEXC and FPSCR registers, so there's
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# no CFI_INSTRUCTION for those saves. So, we should see an 8 byte disparity in
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# the register offsets. $r0 is -40, and $d7 is -56.
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#
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# (-40) - (-56) = 16.
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# 16 = 8 (bytes from $d7) + 8 (bytes from FPSCR + FPEXC)
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#
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# There's an extra BFC to force the stack to be aligned.
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#
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# $sp = BFC $sp, 4294967288 /* ~0x7 */
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#
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# ================================= Epilogue =================================
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#
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# We use the frame pointer to restore the SP. Since $r11 is currently pointing
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# to the previous $r11's stack position (aka base_of_stack - 12), and we
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# allocated 112 bytes, $sp = $r11 - (112 - 12), or $sp = $r11 - 100, which is
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# why we see this instruction:
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#
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# $sp = SUBri $r11, 100
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# CHECK-R-ARM-LABEL: name: irq_fn
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# CHECK-R-ARM-LABEL: bb.0 (%ir-block.0):
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# CHECK-R-ARM: $sp = frame-setup STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r0, killed $r1, killed $r2, killed $r3, killed $r4, killed $r5, killed $r10, killed $r11, killed $r12, killed $lr
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 40
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $ra_auth_code, -8
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $r11, -12
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $r10, -16
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $r5, -20
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $r4, -24
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $r3, -28
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $r2, -32
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $r1, -36
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $r0, -40
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# CHECK-R-ARM-NEXT: $r11 = frame-setup ADDri killed $sp, 28, 14 /* CC::al */, $noreg, $noreg
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION def_cfa $r11, 12
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# CHECK-R-ARM-NEXT: $r4 = frame-setup VMRS 14 /* CC::al */, $noreg, implicit $fpscr
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# CHECK-R-ARM-NEXT: $r5 = frame-setup VMRS_FPEXC 14 /* CC::al */, $noreg, implicit $fpscr
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# CHECK-R-ARM-NEXT: $sp = frame-setup STMDB_UPD $sp, 14 /* CC::al */, $noreg, $r4, $r5
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# CHECK-R-ARM-NEXT: $sp = frame-setup VSTMDDB_UPD $sp, 14 /* CC::al */, $noreg, killed $d0, killed $d1, killed $d2, killed $d3, killed $d4, killed $d5, killed $d6, killed $d7
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $d7, -56
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $d6, -64
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $d5, -72
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $d4, -80
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $d3, -88
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $d2, -96
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $d1, -104
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# CHECK-R-ARM-NEXT: frame-setup CFI_INSTRUCTION offset $d0, -112
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# CHECK-R-ARM-NEXT: $sp = BFC killed $sp, 4294967288, 14 /* CC::al */, $noreg
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# CHECK-R-ARM-NEXT: BL @bar, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp
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# CHECK-R-ARM-NEXT: $sp = frame-destroy SUBri killed $r11, 100, 14 /* CC::al */, $noreg, $noreg
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# CHECK-R-ARM-NEXT: $sp = frame-destroy VLDMDIA_UPD $sp, 14 /* CC::al */, $noreg, def $d0, def $d1, def $d2, def $d3, def $d4, def $d5, def $d6, def $d7
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# CHECK-R-ARM-NEXT: $sp = frame-destroy LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r4, def $r5
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# CHECK-R-ARM-NEXT: frame-destroy VMSR $r4, 14 /* CC::al */, $noreg, implicit-def $fpscr
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# CHECK-R-ARM-NEXT: frame-destroy VMSR_FPEXC $r5, 14 /* CC::al */, $noreg, implicit-def $fpscr
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# =============================================================================
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# =========================== cortex-r thumb-mode =============================
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# =============================================================================
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# This IRQ will save 112 bytes:
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#
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# |-------+------+----------|
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# | reg | size | zone |
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# |-------+------+----------|
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# | LR | 4x1 | GPR |
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# | R12 | 4x1 | |
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# | R7-R0 | 4x8 | |
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# |-------+------+----------|
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# | FPEXC | 4x1 | FPStatus |
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# | FPSCR | 4x1 | |
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# |-------+------+----------|
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# | D7-D0 | 8x8 | FPRegs |
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# |-------+------+----------|
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# | | 112 | |
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# |-------+------+----------|
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#
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# ================================= Prologue =================================
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#
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# Frame pointer (r7) will be store at $original_sp - 12, but we can't save the
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# FP until after we save the GPR zone of registers. The GPR zone of registers
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# moves the stack by 40 bytes. So $original_sp = $current_sp + 40. Thus,
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# $current_sp + 40 - 12 = $current_sp + 28. Thus, we see the instruction:
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#
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# $r7 = t2ADDri $sp, 28
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#
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# We don't have dwarf information for the FPEXC and FPSCR registers, so there's
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# no CFI_INSTRUCTION for those saves. So, we should see an 8 byte disparity in
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# the register offsets. $r0 is -40, and $d7 is -56.
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#
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# (-32) - (-48) = 16.
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# 16 = 8 (bytes from $d7) + 8 (bytes from FPSCR + FPEXC)
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#
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# There's an extra BFC to force the stack to be aligned. This is done in 3
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# steps, because the value of $sp needs to be moved into a low register
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# (r0-r7), and then operated on, and then moved back.
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#
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# $r4 = tMOVr $sp, 14
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# $r4 = t2BFC $r4, 4294967288 /* ~0x7 */, 14
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# $sp = tMOVr $r4, 14
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#
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# ================================= Epilogue =================================
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#
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# We use the frame pointer to restore the SP. Since $r7 is currently pointing
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# to the previous $r7's stack position (aka base_of_stack - 12), and we
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# allocated 112 bytes, $sp = $r7 - (112 - 12), or $sp = $r7 - 100, which is
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# why we see this instruction:
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#
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# $r4 = t2SUBri $r7, 100
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# $sp = tMOVr $r4
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# CHECK-R-THUMB-LABEL: name: irq_fn
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# CHECK-R-THUMB-LABEL: bb.0 (%ir-block.0):
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# CHECK-R-THUMB: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r0, killed $r1, killed $r2, killed $r3, killed $r4, killed $r5, killed $r6, killed $r7, killed $r12, killed $lr
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 40
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $ra_auth_code, -8
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -12
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r6, -16
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r5, -20
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r4, -24
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r3, -28
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r2, -32
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r1, -36
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r0, -40
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# CHECK-R-THUMB-NEXT: $r7 = frame-setup t2ADDri killed $sp, 28, 14 /* CC::al */, $noreg, $noreg
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION def_cfa $r7, 12
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# CHECK-R-THUMB-NEXT: $r4 = frame-setup VMRS 14 /* CC::al */, $noreg, implicit $fpscr
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# CHECK-R-THUMB-NEXT: $r5 = frame-setup VMRS_FPEXC 14 /* CC::al */, $noreg, implicit $fpscr
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# CHECK-R-THUMB-NEXT: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, $r4, $r5
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# CHECK-R-THUMB-NEXT: $sp = frame-setup VSTMDDB_UPD $sp, 14 /* CC::al */, $noreg, killed $d0, killed $d1, killed $d2, killed $d3, killed $d4, killed $d5, killed $d6, killed $d7
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d7, -56
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d6, -64
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d5, -72
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d4, -80
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d3, -88
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d2, -96
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d1, -104
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# CHECK-R-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d0, -112
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# CHECK-R-THUMB-NEXT: $r4 = tMOVr killed $sp, 14 /* CC::al */, $noreg
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# CHECK-R-THUMB-NEXT: $r4 = t2BFC killed $r4, 4294967288, 14 /* CC::al */, $noreg
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# CHECK-R-THUMB-NEXT: $sp = tMOVr killed $r4, 14 /* CC::al */, $noreg
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# CHECK-R-THUMB-NEXT: BL @bar, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp
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# CHECK-R-THUMB-NEXT: $r4 = frame-destroy t2SUBri killed $r7, 100, 14 /* CC::al */, $noreg, $noreg
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# CHECK-R-THUMB-NEXT: $sp = frame-destroy tMOVr $r4, 14 /* CC::al */, $noreg
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# CHECK-R-THUMB-NEXT: $sp = frame-destroy VLDMDIA_UPD $sp, 14 /* CC::al */, $noreg, def $d0, def $d1, def $d2, def $d3, def $d4, def $d5, def $d6, def $d7
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# CHECK-R-THUMB-NEXT: $sp = frame-destroy t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r4, def $r5
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# CHECK-R-THUMB-NEXT: frame-destroy VMSR $r4, 14 /* CC::al */, $noreg, implicit-def $fpscr
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# CHECK-R-THUMB-NEXT: frame-destroy VMSR_FPEXC $r5, 14 /* CC::al */, $noreg, implicit-def $fpscr
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# CHECK-R-THUMB-NEXT: $sp = frame-destroy t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r0, def $r1, def $r2, def $r3, def $r4, def $r5, def $r6, def $r7, def $r12, def $lr
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# CHECK-R-THUMB-NEXT: SUBS_PC_LR 4, 14 /* CC::al */, $noreg
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# =============================================================================
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# ============================== cortex-m thumb ===============================
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# =============================================================================
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# This IRQ will save 88 bytes:
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#
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# |---------+------+----------|
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# | reg | size | zone |
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# |---------+------+----------|
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# | LR | 4x1 | GPR |
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# | R7-R6 | 4x2 | |
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# | R4 | 4x1 | |
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# |---------+------+----------|
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# | FPSCR | 4x1 | FPStatus |
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# |---------+------+----------|
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# | EMPTY | 4x1 | Align |
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# |---------+------+----------|
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# | D7-D0 | 8x8 | FPRegs |
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# |---------+------+----------|
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# | | 88 | |
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# |---------+------+----------|
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# CHECK-M-THUMB-LABEL: name: irq_fn
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# CHECK-M-THUMB-LABEL: bb.0 (%ir-block.0):
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# CHECK-M-THUMB: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r6, killed $r7, killed $lr
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r6, -12
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $r4, -16
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# CHECK-M-THUMB-NEXT: $r7 = frame-setup t2ADDri killed $sp, 8, 14 /* CC::al */, $noreg, $noreg
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION def_cfa $r7, 8
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# CHECK-M-THUMB-NEXT: $r4 = frame-setup VMRS 14 /* CC::al */, $noreg, implicit $fpscr
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# CHECK-M-THUMB-NEXT: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, $r4
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# CHECK-M-THUMB-NEXT: $sp = frame-setup tSUBspi $sp, 1, 14 /* CC::al */, $noreg
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# CHECK-M-THUMB-NEXT: $sp = frame-setup VSTMDDB_UPD $sp, 14 /* CC::al */, $noreg, killed $d0, killed $d1, killed $d2, killed $d3, killed $d4, killed $d5, killed $d6, killed $d7
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d7, -32
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d6, -40
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d5, -48
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d4, -56
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d3, -64
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d2, -72
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d1, -80
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# CHECK-M-THUMB-NEXT: frame-setup CFI_INSTRUCTION offset $d0, -88
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# CHECK-M-THUMB-NEXT: $r4 = tMOVr killed $sp, 14 /* CC::al */, $noreg
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# CHECK-M-THUMB-NEXT: $r4 = t2BFC killed $r4, 4294967288, 14 /* CC::al */, $noreg
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# CHECK-M-THUMB-NEXT: $sp = tMOVr killed $r4, 14 /* CC::al */, $noreg
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# CHECK-M-THUMB-NEXT: BL @bar, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp
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# CHECK-M-THUMB-NEXT: $r4 = frame-destroy t2SUBri killed $r7, 80, 14 /* CC::al */, $noreg, $noreg
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# CHECK-M-THUMB-NEXT: $sp = frame-destroy tMOVr $r4, 14 /* CC::al */, $noreg
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# CHECK-M-THUMB-NEXT: $sp = frame-destroy VLDMDIA_UPD $sp, 14 /* CC::al */, $noreg, def $d0, def $d1, def $d2, def $d3, def $d4, def $d5, def $d6, def $d7
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# CHECK-M-THUMB-NEXT: $sp = frame-destroy tADDspi $sp, 1, 14 /* CC::al */, $noreg
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# CHECK-M-THUMB-NEXT: $sp = frame-destroy t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r4
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# CHECK-M-THUMB-NEXT: frame-destroy VMSR $r4, 14 /* CC::al */, $noreg, implicit-def $fpscr
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# CHECK-M-THUMB-NEXT: $sp = frame-destroy t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r4, def $r6, def $r7, def $lr
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# CHECK-M-THUMB-NEXT: SUBS_PC_LR 4, 14 /* CC::al */, $noreg
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--- |
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; ModuleID = '/scratch/benson/tools2/llvm_cgt/llvm-project/llvm/test/CodeGen/ARM/fp-attr-fpscr.ll'
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source_filename = "/scratch/benson/tools2/llvm_cgt/llvm-project/llvm/test/CodeGen/ARM/fp-attr-fpscr.ll"
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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declare arm_aapcscc void @bar()
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; Function Attrs: alignstack(8)
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define arm_aapcscc void @irq_fn() #1 {
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call arm_aapcscc void @bar()
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ret void
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}
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attributes #1 = { alignstack=8 "interrupt"="IRQ" "target-features"="+fpregs" "save-fp" }
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...
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|
---
|
|
name: irq_fn
|
|
frameInfo:
|
|
adjustsStack: true
|
|
alignment: 16
|
|
body: |
|
|
bb.0 (%ir-block.0):
|
|
ADJCALLSTACKDOWN 0, 0, 14 /* CC::al */, $noreg, implicit-def dead $sp, implicit $sp
|
|
BL @bar, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp
|
|
ADJCALLSTACKUP 0, -1, 14 /* CC::al */, $noreg, implicit-def dead $sp, implicit $sp
|
|
SUBS_PC_LR 4, 14 /* CC::al */, $noreg
|
|
...
|