llvm-project/llvm/test/CodeGen/CSKY/inline-asm-invalid.ll
Zi Xuan Wu a190fcdfcc [CSKY] Add inline asm constraints and related codegen support
There are kinds of inline asm constraints and corresponding register class or register as following.

 'b': mGPRRegClass
 'v': sGPRRegClass
 'w': sFPR32RegClass or sFPR64RegClass
 'c': C register
 'z': R14 register
 'h': HI register
 'l': LO register
 'y': HI or LO register

It also adds codegen test for inline-asm including constraints, clobbers and abi names.
2022-02-07 17:45:37 +08:00

11 lines
428 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: not llc -mtriple=csky < %s 2>&1 | FileCheck %s
define void @constraint_f() nounwind {
; CHECK: error: couldn't allocate input reg for constraint 'v'
tail call void asm "fadds fa0, fa0, $0", "v"(float 0.0)
; CHECK: error: couldn't allocate input reg for constraint 'v'
tail call void asm "faddd fa0, fa0, $0", "v"(double 0.0)
ret void
}