
Adds resource name argument to `llvm.dx.handlefrombinding` and `llvm.dx.handlefromimplicitbinding` intrinsics. SPIR-V currently does not seem to need the resource names so this change only affects DirectX binding intrinsics. Part 2/4 of https://github.com/llvm/llvm-project/issues/105059
82 lines
4.1 KiB
LLVM
82 lines
4.1 KiB
LLVM
; RUN: opt -S -passes=dxil-translate-metadata,dxil-op-lower %s | FileCheck %s
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; RUN: opt -S -passes=dxil-pretty-printer %s 2>&1 >/dev/null | FileCheck --check-prefix=CHECK-PRETTY %s
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; CHECK-PRETTY: Type Format Dim ID HLSL Bind Count
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; CHECK-PRETTY: ---------- ------- ----------- ------- -------------- ---------
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; CHECK-PRETTY: texture f32 buf T0 t7 unbounded
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; CHECK-PRETTY: texture byte r/o T1 t8,space1 1
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; CHECK-PRETTY: texture struct r/o T2 t2,space4 1
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; CHECK-PRETTY: texture u32 buf T3 t3,space5 24
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; CHECK-PRETTY: UAV i32 buf U0 u7,space2 1
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; CHECK-PRETTY: UAV f32 buf U1 u5,space3 1
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target triple = "dxil-pc-shadermodel6.0-compute"
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@BufA.str = private unnamed_addr constant [5 x i8] c"BufA\00", align 1
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@BufB.str = private unnamed_addr constant [5 x i8] c"BufB\00", align 1
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; make sure the string constants are removed from the module
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; CHECK-NOT: private unnamed_addr constant [5 x i8] c"BufA\00", align 1
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; CHECK-NOT: private unnamed_addr constant [5 x i8] c"BufB\00", align 1
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declare i32 @some_val();
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define void @test_buffers() {
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; RWBuffer<float4> Buf : register(u5, space3)
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%typed0 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
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@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0(
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i32 3, i32 5, i32 1, i32 0, i1 false, ptr @BufA.str)
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; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 1, i32 5, i1 false) #[[#ATTR:]]
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; CHECK-NOT: @llvm.dx.cast.handle
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; RWBuffer<int> Buf : register(u7, space2)
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%typed1 = call target("dx.TypedBuffer", i32, 1, 0, 1)
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@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0_1t(
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i32 2, i32 7, i32 1, i32 0, i1 false, ptr null)
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; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 1, i32 0, i32 7, i1 false) #[[#ATTR]]
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; Buffer<uint4> Buf[24] : register(t3, space5)
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; Buffer<uint4> typed2 = Buf[4]
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; Note that the index below is 3 + 4 = 7
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%typed2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0)
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@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_0_0_0t(
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i32 5, i32 3, i32 24, i32 4, i1 false, ptr @BufB.str)
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; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 3, i32 7, i1 false) #[[#ATTR]]
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; struct S { float4 a; uint4 b; };
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; StructuredBuffer<S> Buf : register(t2, space4)
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%struct0 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0)
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@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t(
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i32 4, i32 2, i32 1, i32 0, i1 true, ptr null)
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; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 2, i32 2, i1 true) #[[#ATTR]]
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; ByteAddressBuffer Buf : register(t8, space1)
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%byteaddr0 = call target("dx.RawBuffer", i8, 0, 0)
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@llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t(
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i32 1, i32 8, i32 1, i32 0, i1 false, ptr null)
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; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 1, i32 8, i1 false) #[[#ATTR]]
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; Buffer<float4> Buf[] : register(t7)
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; Buffer<float4> typed3 = Buf[ix]
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%typed3_ix = call i32 @some_val()
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%typed3 = call target("dx.TypedBuffer", <4 x float>, 0, 0, 0)
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@llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_0_0_0t(
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i32 0, i32 7, i32 -1, i32 %typed3_ix, i1 false, ptr null)
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; CHECK: %[[IX:.*]] = add i32 %typed3_ix, 7
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; CHECK: call %dx.types.Handle @dx.op.createHandle(i32 57, i8 0, i32 0, i32 %[[IX]], i1 false) #[[#ATTR]]
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ret void
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}
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; CHECK: attributes #[[#ATTR]] = {{{.*}} memory(read) {{.*}}}
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; Just check that we have the right types and number of metadata nodes, the
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; contents of the metadata are tested elsewhere.
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;
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; CHECK: !dx.resources = !{[[RESMD:![0-9]+]]}
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; CHECK: [[RESMD]] = !{[[SRVMD:![0-9]+]], [[UAVMD:![0-9]+]], null, null}
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; CHECK-DAG: [[SRVMD]] = !{!{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}}
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; CHECK-DAG: [[UAVMD]] = !{!{{[0-9]+}}, !{{[0-9]+}}}
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attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) }
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