
- Redefines `DXILAttribute` to denote a function attribute, compatible to how it was define in DXC/LLVM 3.7 - Fix how `DXILAttribute` is emitted to be a struct of set attributes instead of an "or" of the enums - Implement the lowering of `DXILAttribute` to LLVM function attributes in `DXILOpBuilder.cpp`. A custom mapping is defined. - Audit all current ops to specify the correct attributes consistent with DXC. This is done here to allow for testing. - Update testcases in `llvm/test/CodeGen/DirectX` of all ops with attributes to match that attributes are set - Update testcases of ops that had previously incorrectly set attributes to check there is no attributes set - Defines `DXILProperty` to denote the other type of attributes from DXC used to query properties. - Emit `DXILProperty` as a struct of set attributes. - Updates `DXIL.td` to specify applicable `DXILProperty`s on ops Note: `DXILProperty` was referred to as 'queryable attributes' in design discussion. Changed to property to allow for better expression in `DXIL.td` Resolves #114461 Resolves #115912
36 lines
1.7 KiB
LLVM
36 lines
1.7 KiB
LLVM
; RUN: opt -S -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-compute %s | FileCheck %s
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; Test that for vector values, WaveReadLaneAt scalarizes and maps down to the
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; DirectX op
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define noundef <2 x half> @wave_read_lane_v2half(<2 x half> noundef %expr, i32 %idx) {
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entry:
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; CHECK: call half @dx.op.waveReadLaneAt.f16(i32 117, half %expr.i0, i32 %idx){{$}}
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; CHECK: call half @dx.op.waveReadLaneAt.f16(i32 117, half %expr.i1, i32 %idx){{$}}
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%ret = call <2 x half> @llvm.dx.wave.readlane.f16(<2 x half> %expr, i32 %idx)
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ret <2 x half> %ret
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}
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define noundef <3 x i32> @wave_read_lane_v3i32(<3 x i32> noundef %expr, i32 %idx) {
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entry:
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; CHECK: call i32 @dx.op.waveReadLaneAt.i32(i32 117, i32 %expr.i0, i32 %idx){{$}}
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; CHECK: call i32 @dx.op.waveReadLaneAt.i32(i32 117, i32 %expr.i1, i32 %idx){{$}}
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; CHECK: call i32 @dx.op.waveReadLaneAt.i32(i32 117, i32 %expr.i2, i32 %idx){{$}}
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%ret = call <3 x i32> @llvm.dx.wave.readlane(<3 x i32> %expr, i32 %idx)
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ret <3 x i32> %ret
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}
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define noundef <4 x double> @wave_read_lane_v4f64(<4 x double> noundef %expr, i32 %idx) {
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entry:
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; CHECK: call double @dx.op.waveReadLaneAt.f64(i32 117, double %expr.i0, i32 %idx){{$}}
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; CHECK: call double @dx.op.waveReadLaneAt.f64(i32 117, double %expr.i1, i32 %idx){{$}}
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; CHECK: call double @dx.op.waveReadLaneAt.f64(i32 117, double %expr.i2, i32 %idx){{$}}
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; CHECK: call double @dx.op.waveReadLaneAt.f64(i32 117, double %expr.i3, i32 %idx){{$}}
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%ret = call <4 x double> @llvm.dx.wave.readlane(<4 x double> %expr, i32 %idx)
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ret <4 x double> %ret
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}
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declare <2 x half> @llvm.dx.wave.readlane.v2f16(<2 x half>, i32)
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declare <3 x i32> @llvm.dx.wave.readlane.v3i32(<3 x i32>, i32)
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declare <4 x double> @llvm.dx.wave.readlane.v4f64(<4 x double>, i32)
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