2208c97c1b
Similar to 806761a7629df268c8aed49657aeccffa6bca449 -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly.
53 lines
1.2 KiB
LLVM
53 lines
1.2 KiB
LLVM
; RUN: llc -mtriple=hexagon < %s | FileCheck %s
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target triple = "hexagon"
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; CHECK-LABEL: test1:
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; CHECK: r0 = ##1073741824
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define i32 @test1() #0 {
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entry:
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%0 = tail call i32 @llvm.hexagon.S2.asr.i.r.rnd(i32 2147483647, i32 0)
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ret i32 %0
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}
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; CHECK-LABEL: test2:
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; CHECK: r0 = ##1073741824
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define i32 @test2() #0 {
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entry:
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%0 = tail call i32 @llvm.hexagon.S2.asr.i.r.rnd.goodsyntax(i32 2147483647, i32 1)
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ret i32 %0
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}
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; CHECK-LABEL: test3:
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; CHECK: r1:0 = combine(#0,#1)
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define i64 @test3() #0 {
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entry:
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%0 = tail call i64 @llvm.hexagon.S4.extractp(i64 -1, i32 63, i32 63)
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ret i64 %0
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}
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; CHECK-LABEL: test4:
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; CHECK: r0 = #1
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define i32 @test4() #0 {
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entry:
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%0 = tail call i32 @llvm.hexagon.S4.extract(i32 -1, i32 31, i32 31)
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ret i32 %0
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}
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; CHECK-LABEL: test5:
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; CHECK: r0 = ##-1073741569
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define i32 @test5() #0 {
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entry:
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%0 = tail call i32 @llvm.hexagon.S4.subi.lsr.ri(i32 255, i32 -2147483648, i32 1)
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ret i32 %0
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}
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declare i32 @llvm.hexagon.S2.asr.i.r.rnd(i32, i32) #0
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declare i32 @llvm.hexagon.S2.asr.i.r.rnd.goodsyntax(i32, i32) #0
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declare i64 @llvm.hexagon.S4.extractp(i64, i32, i32) #0
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declare i32 @llvm.hexagon.S4.extract(i32, i32, i32) #0
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declare i32 @llvm.hexagon.S4.subi.lsr.ri(i32, i32, i32) #0
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attributes #0 = { nounwind readnone }
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