2208c97c1b
Similar to 806761a7629df268c8aed49657aeccffa6bca449 -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly.
64 lines
1.6 KiB
LLVM
64 lines
1.6 KiB
LLVM
; RUN: llc -mtriple=hexagon -hexagon-initial-cfg-cleanup=0 < %s | FileCheck %s
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; CHECK-DAG: r[[REG:[0-9]+]] = memw(r{{[0-9]+<<#[0-9]+}}+##.LJTI{{.*}})
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; CHECK-DAG: jumpr r[[REG]]
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define void @main() #0 {
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entry:
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%ret = alloca i32, align 4
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br label %while.body
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while.body:
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%ret.0.load17 = load volatile i32, ptr %ret, align 4
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switch i32 %ret.0.load17, label %label6 [
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i32 0, label %label0
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i32 1, label %label1
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i32 2, label %label2
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i32 3, label %label3
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i32 4, label %label4
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i32 5, label %label5
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]
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label0:
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%ret.0.load18 = load volatile i32, ptr %ret, align 4
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%inc = add nsw i32 %ret.0.load18, 1
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store volatile i32 %inc, ptr %ret, align 4
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br label %while.body
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label1:
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%ret.0.load19 = load volatile i32, ptr %ret, align 4
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%inc2 = add nsw i32 %ret.0.load19, 1
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store volatile i32 %inc2, ptr %ret, align 4
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br label %while.body
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label2:
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%ret.0.load20 = load volatile i32, ptr %ret, align 4
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%inc4 = add nsw i32 %ret.0.load20, 1
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store volatile i32 %inc4, ptr %ret, align 4
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br label %while.body
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label3:
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%ret.0.load21 = load volatile i32, ptr %ret, align 4
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%inc6 = add nsw i32 %ret.0.load21, 1
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store volatile i32 %inc6, ptr %ret, align 4
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br label %while.body
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label4:
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%ret.0.load22 = load volatile i32, ptr %ret, align 4
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%inc8 = add nsw i32 %ret.0.load22, 1
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store volatile i32 %inc8, ptr %ret, align 4
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br label %while.body
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label5:
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%ret.0.load23 = load volatile i32, ptr %ret, align 4
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%inc10 = add nsw i32 %ret.0.load23, 1
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store volatile i32 %inc10, ptr %ret, align 4
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br label %while.body
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label6:
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store volatile i32 0, ptr %ret, align 4
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br label %while.body
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}
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attributes #0 = { noreturn nounwind }
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