llvm-project/llvm/test/CodeGen/Hexagon/hvx-double-vzero.ll
Fangrui Song 2208c97c1b [Hexagon,test] Change llc -march= to -mtriple=
Similar to 806761a7629df268c8aed49657aeccffa6bca449

-mtriple= specifies the full target triple while -march= merely sets the
architecture part of the default target triple, leaving a target triple which
may not make sense.

Therefore, -march= is error-prone and not recommended for tests without a target
triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead
of rejecting it outrightly.
2024-12-15 10:20:22 -08:00

32 lines
937 B
LLVM

; RUN: llc -mtriple=hexagon < %s | FileCheck %s
; Test that V_vzero and W_vzero intrinsics work. The W_vzero intrinsic was added
; for v65/hvx.
; CHECK-LABEL: f0:
; CHECK: [[VREG1:v([0-9]+)]] = vxor([[VREG1]],[[VREG1]])
define void @f0(ptr nocapture %a0) #0 {
b0:
%v1 = tail call <32 x i32> @llvm.hexagon.V6.vd0.128B()
store <32 x i32> %v1, ptr %a0, align 64
ret void
}
; Function Attrs: nounwind readnone
declare <32 x i32> @llvm.hexagon.V6.vd0.128B() #1
; CHECK-LABEL: f1:
; CHECK: [[VREG2:v([0-9]+):([0-9]+).w]] = vsub([[VREG2]],[[VREG2]])
define void @f1(ptr nocapture %a0) #0 {
b0:
%v1 = tail call <64 x i32> @llvm.hexagon.V6.vdd0.128B()
store <64 x i32> %v1, ptr %a0, align 128
ret void
}
; Function Attrs: nounwind readnone
declare <64 x i32> @llvm.hexagon.V6.vdd0.128B() #1
attributes #0 = { nounwind "target-cpu"="hexagonv65" "target-features"="+hvxv65,+hvx-length128b" }
attributes #1 = { nounwind readnone }