2208c97c1b
Similar to 806761a7629df268c8aed49657aeccffa6bca449 -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly.
71 lines
1.8 KiB
LLVM
71 lines
1.8 KiB
LLVM
; RUN: llc -mtriple=hexagon < %s | FileCheck %s
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; Check that we generate load instruction with (base + register offset << x)
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; load word
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define i32 @load_w(ptr nocapture %a, i32 %n, i32 %m) nounwind {
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; CHECK: r{{[0-9]+}} = memw(r{{[0-9]+}}+r{{[0-9]+}}<<#2)
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entry:
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%tmp = add i32 %n, %m
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%scevgep9 = getelementptr i32, ptr %a, i32 %tmp
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%val = load i32, ptr %scevgep9, align 4
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ret i32 %val
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}
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; load unsigned half word
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define i16 @load_uh(ptr nocapture %a, i32 %n, i32 %m) nounwind {
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; CHECK: r{{[0-9]+}} = memuh(r{{[0-9]+}}+r{{[0-9]+}}<<#1)
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entry:
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%tmp = add i32 %n, %m
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%scevgep9 = getelementptr i16, ptr %a, i32 %tmp
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%val = load i16, ptr %scevgep9, align 2
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ret i16 %val
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}
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; load signed half word
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define i32 @load_h(ptr nocapture %a, i32 %n, i32 %m) nounwind {
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; CHECK: r{{[0-9]+}} = memh(r{{[0-9]+}}+r{{[0-9]+}}<<#1)
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entry:
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%tmp = add i32 %n, %m
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%scevgep9 = getelementptr i16, ptr %a, i32 %tmp
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%val = load i16, ptr %scevgep9, align 2
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%conv = sext i16 %val to i32
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ret i32 %conv
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}
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; load unsigned byte
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define i8 @load_ub(ptr nocapture %a, i32 %n, i32 %m) nounwind {
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; CHECK: r{{[0-9]+}} = memub(r{{[0-9]+}}+r{{[0-9]+}}<<#0)
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entry:
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%tmp = add i32 %n, %m
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%scevgep9 = getelementptr i8, ptr %a, i32 %tmp
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%val = load i8, ptr %scevgep9, align 1
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ret i8 %val
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}
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; load signed byte
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define i32 @foo_2(ptr nocapture %a, i32 %n, i32 %m) nounwind {
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; CHECK: r{{[0-9]+}} = memb(r{{[0-9]+}}+r{{[0-9]+}}<<#0)
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entry:
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%tmp = add i32 %n, %m
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%scevgep9 = getelementptr i8, ptr %a, i32 %tmp
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%val = load i8, ptr %scevgep9, align 1
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%conv = sext i8 %val to i32
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ret i32 %conv
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}
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; load doubleword
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define i64 @load_d(ptr nocapture %a, i32 %n, i32 %m) nounwind {
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; CHECK: r{{[0-9]+}}:{{[0-9]+}} = memd(r{{[0-9]+}}+r{{[0-9]+}}<<#3)
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entry:
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%tmp = add i32 %n, %m
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%scevgep9 = getelementptr i64, ptr %a, i32 %tmp
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%val = load i64, ptr %scevgep9, align 8
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ret i64 %val
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}
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