
When folding (or (shl xx, s), (zext y)) to (COMBINE (shl xx, s-32), y), fix resulting shift value in HexagonISD::COMBINE node to not generate negative values. --------- Co-authored-by: Yashas Andaluri <yandalur@qti.qualcomm.com>
38 lines
1.3 KiB
LLVM
38 lines
1.3 KiB
LLVM
; RUN: llc -mtriple=hexagon-unknown-elf < %s | FileCheck %s
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; In ISelLowering, when folding nodes (or (shl xx, s), (zext y))
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; to (COMBINE (shl xx, s-32), y) where s >= 32,
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; check that resulting shift value does not create an undef
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target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
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target triple = "hexagon"
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; Function Attrs: nofree nosync nounwind memory(readwrite, inaccessiblemem: none)
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define dso_local void @foo(i64* nocapture noundef %buf, i32 %a, i32 %b) local_unnamed_addr {
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; CHECK-LABEL: foo:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: {
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; CHECK-NEXT: r[[REG0:[0-9]+]] = addasl(r2,r1,#1)
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; CHECK-NEXT: r[[REG2:[0-9]+]] = asl(r1,#1)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: r[[REG1:[0-9]+]] = addasl(r[[REG0]],r1,#1)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: memd(r0+#8) = r[[REG2]]:[[REG1]]
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; CHECK-NEXT: }
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entry:
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%arrayidx = getelementptr inbounds i64, i64* %buf, i32 1
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%add0 = shl nsw i32 %a, 1
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%add1 = add nsw i32 %add0, %b
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%add2 = add nsw i32 %add1, %add0
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%ext0 = zext i32 %add0 to i64
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%shift0 = shl nuw i64 %ext0, 32
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%ext1 = zext i32 %add2 to i64
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%or0 = or i64 %shift0, %ext1
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store i64 %or0, i64* %arrayidx, align 8
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ret void
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}
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