746c682c4a
According to the offical LoongArch reference manual, the 32-bit
LoongArch is divied into two variants: the Reduced version (LA32R) and
Standard version (LA32S). LA32S extends LA32R by adding additional
instructions, and the 64-bit version (LA64) fully includes the LA32S
instruction set.
This patch introduces a new target feature `32s` for the LoongArch
backend, enabling support for instructions specific to the LA32S
variant.
The LA32S exntension includes the following additional instructions:
- ALSL.W
- {AND,OR}N
- B{EQ,NE}Z
- BITREV.{4B,W}
- BSTR{INS,PICK}.W
- BYTEPICK.W
- CL{O,Z}.W
- CPUCFG
- CT{O,Z}.W
- EXT.W,{B,H}
- F{LD,ST}X.{D,S}
- MASK{EQ,NE}Z
- PC{ADDI,ALAU12I}
- REVB.2H
- ROTR{I},W
Additionally, LA32R defines three new instruction aliases:
- RDCNTID.W RJ => RDTIMEL.W ZERO, RJ
- RDCNTVH.W RD => RDTIMEH.W RD, ZERO
- RDCNTVL.W RD => RDTIMEL.W RD, ZERO
134 lines
4.1 KiB
LLVM
134 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc --mtriple=loongarch32 -mattr=+32s,+d \
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; RUN: --min-jump-table-entries=4 < %s \
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; RUN: --loongarch-annotate-tablejump \
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; RUN: | FileCheck %s --check-prefix=LA32-JT
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; RUN: llc --mtriple=loongarch64 -mattr=+d \
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; RUN: --min-jump-table-entries=4 < %s \
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; RUN: --loongarch-annotate-tablejump \
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; RUN: | FileCheck %s --check-prefix=LA64-JT
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define void @switch_4_arms(i32 %in, ptr %out) nounwind {
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; LA32-JT-LABEL: switch_4_arms:
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; LA32-JT: # %bb.0: # %entry
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; LA32-JT-NEXT: addi.w $a3, $a0, -1
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; LA32-JT-NEXT: ori $a2, $zero, 3
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; LA32-JT-NEXT: bltu $a2, $a3, .LBB0_7
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; LA32-JT-NEXT: # %bb.1: # %entry
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; LA32-JT-NEXT: pcalau12i $a4, %pc_hi20(.LJTI0_0)
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; LA32-JT-NEXT: addi.w $a4, $a4, %pc_lo12(.LJTI0_0)
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; LA32-JT-NEXT: alsl.w $a3, $a3, $a4, 2
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; LA32-JT-NEXT: ld.w $a3, $a3, 0
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; LA32-JT-NEXT: .Ljrtb_0:
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; LA32-JT-NEXT: jr $a3
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; LA32-JT-NEXT: .LBB0_2: # %bb1
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; LA32-JT-NEXT: ori $a3, $zero, 4
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; LA32-JT-NEXT: b .LBB0_6
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; LA32-JT-NEXT: .LBB0_3: # %bb2
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; LA32-JT-NEXT: ori $a3, $zero, 3
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; LA32-JT-NEXT: b .LBB0_6
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; LA32-JT-NEXT: .LBB0_4: # %bb3
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; LA32-JT-NEXT: ori $a3, $zero, 2
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; LA32-JT-NEXT: b .LBB0_6
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; LA32-JT-NEXT: .LBB0_5: # %bb4
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; LA32-JT-NEXT: ori $a3, $zero, 1
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; LA32-JT-NEXT: .LBB0_6: # %exit
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; LA32-JT-NEXT: st.w $a3, $a1, 0
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; LA32-JT-NEXT: .LBB0_7: # %exit
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; LA32-JT-NEXT: addi.w $a3, $a0, -5
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; LA32-JT-NEXT: bltu $a2, $a3, .LBB0_9
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; LA32-JT-NEXT: # %bb.8: # %exit
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; LA32-JT-NEXT: pcalau12i $a4, %pc_hi20(.LJTI0_1)
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; LA32-JT-NEXT: addi.w $a4, $a4, %pc_lo12(.LJTI0_1)
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; LA32-JT-NEXT: alsl.w $a3, $a3, $a4, 2
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; LA32-JT-NEXT: ld.w $a3, $a3, 0
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; LA32-JT-NEXT: .Ljrtb_1:
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; LA32-JT-NEXT: jr $a3
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; LA32-JT-NEXT: .LBB0_9: # %exit2
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; LA32-JT-NEXT: ret
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;
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; LA64-JT-LABEL: switch_4_arms:
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; LA64-JT: # %bb.0: # %entry
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; LA64-JT-NEXT: addi.w $a0, $a0, 0
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; LA64-JT-NEXT: addi.d $a3, $a0, -1
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; LA64-JT-NEXT: ori $a2, $zero, 3
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; LA64-JT-NEXT: bltu $a2, $a3, .LBB0_7
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; LA64-JT-NEXT: # %bb.1: # %entry
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; LA64-JT-NEXT: slli.d $a3, $a3, 3
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; LA64-JT-NEXT: pcalau12i $a4, %pc_hi20(.LJTI0_0)
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; LA64-JT-NEXT: addi.d $a4, $a4, %pc_lo12(.LJTI0_0)
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; LA64-JT-NEXT: ldx.d $a3, $a4, $a3
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; LA64-JT-NEXT: .Ljrtb_0:
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; LA64-JT-NEXT: jr $a3
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; LA64-JT-NEXT: .LBB0_2: # %bb1
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; LA64-JT-NEXT: ori $a3, $zero, 4
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; LA64-JT-NEXT: b .LBB0_6
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; LA64-JT-NEXT: .LBB0_3: # %bb2
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; LA64-JT-NEXT: ori $a3, $zero, 3
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; LA64-JT-NEXT: b .LBB0_6
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; LA64-JT-NEXT: .LBB0_4: # %bb3
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; LA64-JT-NEXT: ori $a3, $zero, 2
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; LA64-JT-NEXT: b .LBB0_6
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; LA64-JT-NEXT: .LBB0_5: # %bb4
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; LA64-JT-NEXT: ori $a3, $zero, 1
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; LA64-JT-NEXT: .LBB0_6: # %exit
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; LA64-JT-NEXT: st.w $a3, $a1, 0
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; LA64-JT-NEXT: .LBB0_7: # %exit
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; LA64-JT-NEXT: addi.d $a3, $a0, -5
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; LA64-JT-NEXT: bltu $a2, $a3, .LBB0_9
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; LA64-JT-NEXT: # %bb.8: # %exit
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; LA64-JT-NEXT: slli.d $a3, $a3, 3
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; LA64-JT-NEXT: pcalau12i $a4, %pc_hi20(.LJTI0_1)
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; LA64-JT-NEXT: addi.d $a4, $a4, %pc_lo12(.LJTI0_1)
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; LA64-JT-NEXT: ldx.d $a3, $a4, $a3
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; LA64-JT-NEXT: .Ljrtb_1:
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; LA64-JT-NEXT: jr $a3
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; LA64-JT-NEXT: .LBB0_9: # %exit2
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; LA64-JT-NEXT: ret
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entry:
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switch i32 %in, label %exit [
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i32 1, label %bb1
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i32 2, label %bb2
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i32 3, label %bb3
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i32 4, label %bb4
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]
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bb1:
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store i32 4, ptr %out
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br label %exit
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bb2:
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store i32 3, ptr %out
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br label %exit
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bb3:
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store i32 2, ptr %out
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br label %exit
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bb4:
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store i32 1, ptr %out
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br label %exit
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exit:
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switch i32 %in, label %exit2 [
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i32 5, label %bb1
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i32 6, label %bb2
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i32 7, label %bb3
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i32 8, label %bb4
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]
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exit2:
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ret void
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}
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; UTC_ARGS: --disable
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; LA32-JT-LABEL: .LJTI0_0:
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; LA32-JT: .section .discard.tablejump_annotate,"",@progbits
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; LA32-JT-NEXT: .word .Ljrtb_0
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; LA32-JT-NEXT: .word .LJTI0_0
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; LA32-JT-NEXT: .word .Ljrtb_1
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; LA32-JT-NEXT: .word .LJTI0_1
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; UTC_ARGS: --disable
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; LA64-JT-LABEL: .LJTI0_0:
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; LA64-JT: .section .discard.tablejump_annotate,"",@progbits
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; LA64-JT-NEXT: .dword .Ljrtb_0
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; LA64-JT-NEXT: .dword .LJTI0_0
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; LA64-JT-NEXT: .dword .Ljrtb_1
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; LA64-JT-NEXT: .dword .LJTI0_1
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