hev 746c682c4a
[LoongArch] Introduce 32s target feature for LA32S ISA extensions (#139695)
According to the offical LoongArch reference manual, the 32-bit
LoongArch is divied into two variants: the Reduced version (LA32R) and
Standard version (LA32S). LA32S extends LA32R by adding additional
instructions, and the 64-bit version (LA64) fully includes the LA32S
instruction set.

This patch introduces a new target feature `32s` for the LoongArch
backend, enabling support for instructions specific to the LA32S
variant.

The LA32S exntension includes the following additional instructions:

- ALSL.W
- {AND,OR}N
- B{EQ,NE}Z
- BITREV.{4B,W}
- BSTR{INS,PICK}.W
- BYTEPICK.W
- CL{O,Z}.W
- CPUCFG
- CT{O,Z}.W
- EXT.W,{B,H}
- F{LD,ST}X.{D,S}
- MASK{EQ,NE}Z
- PC{ADDI,ALAU12I}
- REVB.2H
- ROTR{I},W

Additionally, LA32R defines three new instruction aliases:

- RDCNTID.W RJ => RDTIMEL.W ZERO, RJ
- RDCNTVH.W RD => RDTIMEH.W RD, ZERO
- RDCNTVL.W RD => RDTIMEL.W RD, ZERO
2025-05-20 18:28:08 +08:00

143 lines
4.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 -mattr=-32s,+lsx < %s | FileCheck %s --check-prefix=LA32R
; RUN: llc --mtriple=loongarch32 -mattr=+32s,+lsx < %s | FileCheck %s --check-prefix=LA32S
; RUN: llc --mtriple=loongarch64 -mattr=+lsx < %s | FileCheck %s --check-prefix=LA64
declare i8 @llvm.ctpop.i8(i8)
declare i16 @llvm.ctpop.i16(i16)
declare i32 @llvm.ctpop.i32(i32)
declare i64 @llvm.ctpop.i64(i64)
define i8 @test_ctpop_i8(i8 %a) nounwind {
; LA32R-LABEL: test_ctpop_i8:
; LA32R: # %bb.0:
; LA32R-NEXT: andi $a0, $a0, 255
; LA32R-NEXT: vldi $vr0, 0
; LA32R-NEXT: vinsgr2vr.w $vr0, $a0, 0
; LA32R-NEXT: vpcnt.w $vr0, $vr0
; LA32R-NEXT: vpickve2gr.w $a0, $vr0, 0
; LA32R-NEXT: ret
;
; LA32S-LABEL: test_ctpop_i8:
; LA32S: # %bb.0:
; LA32S-NEXT: andi $a0, $a0, 255
; LA32S-NEXT: vldi $vr0, 0
; LA32S-NEXT: vinsgr2vr.w $vr0, $a0, 0
; LA32S-NEXT: vpcnt.w $vr0, $vr0
; LA32S-NEXT: vpickve2gr.w $a0, $vr0, 0
; LA32S-NEXT: ret
;
; LA64-LABEL: test_ctpop_i8:
; LA64: # %bb.0:
; LA64-NEXT: andi $a0, $a0, 255
; LA64-NEXT: vldi $vr0, 0
; LA64-NEXT: vinsgr2vr.d $vr0, $a0, 0
; LA64-NEXT: vpcnt.d $vr0, $vr0
; LA64-NEXT: vpickve2gr.d $a0, $vr0, 0
; LA64-NEXT: ret
%1 = call i8 @llvm.ctpop.i8(i8 %a)
ret i8 %1
}
define i16 @test_ctpop_i16(i16 %a) nounwind {
; LA32R-LABEL: test_ctpop_i16:
; LA32R: # %bb.0:
; LA32R-NEXT: lu12i.w $a1, 15
; LA32R-NEXT: ori $a1, $a1, 4095
; LA32R-NEXT: and $a0, $a0, $a1
; LA32R-NEXT: vldi $vr0, 0
; LA32R-NEXT: vinsgr2vr.w $vr0, $a0, 0
; LA32R-NEXT: vpcnt.w $vr0, $vr0
; LA32R-NEXT: vpickve2gr.w $a0, $vr0, 0
; LA32R-NEXT: ret
;
; LA32S-LABEL: test_ctpop_i16:
; LA32S: # %bb.0:
; LA32S-NEXT: bstrpick.w $a0, $a0, 15, 0
; LA32S-NEXT: vldi $vr0, 0
; LA32S-NEXT: vinsgr2vr.w $vr0, $a0, 0
; LA32S-NEXT: vpcnt.w $vr0, $vr0
; LA32S-NEXT: vpickve2gr.w $a0, $vr0, 0
; LA32S-NEXT: ret
;
; LA64-LABEL: test_ctpop_i16:
; LA64: # %bb.0:
; LA64-NEXT: bstrpick.d $a0, $a0, 15, 0
; LA64-NEXT: vldi $vr0, 0
; LA64-NEXT: vinsgr2vr.d $vr0, $a0, 0
; LA64-NEXT: vpcnt.d $vr0, $vr0
; LA64-NEXT: vpickve2gr.d $a0, $vr0, 0
; LA64-NEXT: ret
%1 = call i16 @llvm.ctpop.i16(i16 %a)
ret i16 %1
}
define i32 @test_ctpop_i32(i32 %a) nounwind {
; LA32R-LABEL: test_ctpop_i32:
; LA32R: # %bb.0:
; LA32R-NEXT: vldi $vr0, 0
; LA32R-NEXT: vinsgr2vr.w $vr0, $a0, 0
; LA32R-NEXT: vpcnt.w $vr0, $vr0
; LA32R-NEXT: vpickve2gr.w $a0, $vr0, 0
; LA32R-NEXT: ret
;
; LA32S-LABEL: test_ctpop_i32:
; LA32S: # %bb.0:
; LA32S-NEXT: vldi $vr0, 0
; LA32S-NEXT: vinsgr2vr.w $vr0, $a0, 0
; LA32S-NEXT: vpcnt.w $vr0, $vr0
; LA32S-NEXT: vpickve2gr.w $a0, $vr0, 0
; LA32S-NEXT: ret
;
; LA64-LABEL: test_ctpop_i32:
; LA64: # %bb.0:
; LA64-NEXT: bstrpick.d $a0, $a0, 31, 0
; LA64-NEXT: vldi $vr0, 0
; LA64-NEXT: vinsgr2vr.d $vr0, $a0, 0
; LA64-NEXT: vpcnt.d $vr0, $vr0
; LA64-NEXT: vpickve2gr.d $a0, $vr0, 0
; LA64-NEXT: ret
%1 = call i32 @llvm.ctpop.i32(i32 %a)
ret i32 %1
}
define i64 @test_ctpop_i64(i64 %a) nounwind {
; LA32R-LABEL: test_ctpop_i64:
; LA32R: # %bb.0:
; LA32R-NEXT: vldi $vr0, 0
; LA32R-NEXT: vldi $vr1, 0
; LA32R-NEXT: vinsgr2vr.w $vr1, $a1, 0
; LA32R-NEXT: vpcnt.w $vr1, $vr1
; LA32R-NEXT: vpickve2gr.w $a1, $vr1, 0
; LA32R-NEXT: vinsgr2vr.w $vr0, $a0, 0
; LA32R-NEXT: vpcnt.w $vr0, $vr0
; LA32R-NEXT: vpickve2gr.w $a0, $vr0, 0
; LA32R-NEXT: add.w $a0, $a0, $a1
; LA32R-NEXT: move $a1, $zero
; LA32R-NEXT: ret
;
; LA32S-LABEL: test_ctpop_i64:
; LA32S: # %bb.0:
; LA32S-NEXT: vldi $vr0, 0
; LA32S-NEXT: vldi $vr1, 0
; LA32S-NEXT: vinsgr2vr.w $vr1, $a1, 0
; LA32S-NEXT: vpcnt.w $vr1, $vr1
; LA32S-NEXT: vpickve2gr.w $a1, $vr1, 0
; LA32S-NEXT: vinsgr2vr.w $vr0, $a0, 0
; LA32S-NEXT: vpcnt.w $vr0, $vr0
; LA32S-NEXT: vpickve2gr.w $a0, $vr0, 0
; LA32S-NEXT: add.w $a0, $a0, $a1
; LA32S-NEXT: move $a1, $zero
; LA32S-NEXT: ret
;
; LA64-LABEL: test_ctpop_i64:
; LA64: # %bb.0:
; LA64-NEXT: vldi $vr0, 0
; LA64-NEXT: vinsgr2vr.d $vr0, $a0, 0
; LA64-NEXT: vpcnt.d $vr0, $vr0
; LA64-NEXT: vpickve2gr.d $a0, $vr0, 0
; LA64-NEXT: ret
%1 = call i64 @llvm.ctpop.i64(i64 %a)
ret i64 %1
}