394f30919a
This patch adds support for constraints `f`, `l`, `I`, `K` according to [1]. The remain constraints (`k`, `m`, `ZB`, `ZC`) will be added later as they are a little more complex than the others. f: A floating-point register (if available). l: A signed 16-bit constant. I: A signed 12-bit constant (for arithmetic instructions). K: An unsigned 12-bit constant (for logic instructions). For now, no need to support register alias (e.g. `$a0`) in llvm as clang will correctly decode the usage of register name aliases into their official names. And AFAIK, the not yet upstreamed `rustc` for LoongArch will always use official register names (e.g. `$r4`). [1] https://gcc.gnu.org/onlinedocs/gccint/Machine-Constraints.html Differential Revision: https://reviews.llvm.org/D134157
51 lines
2.0 KiB
LLVM
51 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 --mattr=+d --target-abi=ilp32d --verify-machineinstrs < %s \
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; RUN: | FileCheck --check-prefix=LA32 %s
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; RUN: llc --mtriple=loongarch64 --mattr=+d --target-abi=lp64d --verify-machineinstrs < %s \
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; RUN: | FileCheck --check-prefix=LA64 %s
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;; Check that callee-saved registers clobbered by inlineasm are correctly saved.
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;;
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;; $r23: $s0 (callee-saved register under all ABIs)
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;; $r24: $s1 (callee-saved register under all ABIs)
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;; $f24: $fs0 (callee-saved register under *d/*f ABIs)
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;; $f25: $fs1 (callee-saved register under *d/*f ABIs)
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;; TODO: test other ABIs.
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define void @test() nounwind {
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; LA32-LABEL: test:
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; LA32: # %bb.0:
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; LA32-NEXT: addi.w $sp, $sp, -32
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; LA32-NEXT: st.w $s0, $sp, 28 # 4-byte Folded Spill
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; LA32-NEXT: st.w $s1, $sp, 24 # 4-byte Folded Spill
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; LA32-NEXT: fst.d $fs0, $sp, 16 # 8-byte Folded Spill
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; LA32-NEXT: fst.d $fs1, $sp, 8 # 8-byte Folded Spill
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; LA32-NEXT: #APP
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; LA32-NEXT: #NO_APP
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; LA32-NEXT: fld.d $fs1, $sp, 8 # 8-byte Folded Reload
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; LA32-NEXT: fld.d $fs0, $sp, 16 # 8-byte Folded Reload
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; LA32-NEXT: ld.w $s1, $sp, 24 # 4-byte Folded Reload
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; LA32-NEXT: ld.w $s0, $sp, 28 # 4-byte Folded Reload
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; LA32-NEXT: addi.w $sp, $sp, 32
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; LA32-NEXT: ret
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;
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; LA64-LABEL: test:
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; LA64: # %bb.0:
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; LA64-NEXT: addi.d $sp, $sp, -32
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; LA64-NEXT: st.d $s0, $sp, 24 # 8-byte Folded Spill
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; LA64-NEXT: st.d $s1, $sp, 16 # 8-byte Folded Spill
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; LA64-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill
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; LA64-NEXT: fst.d $fs1, $sp, 0 # 8-byte Folded Spill
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; LA64-NEXT: #APP
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; LA64-NEXT: #NO_APP
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; LA64-NEXT: fld.d $fs1, $sp, 0 # 8-byte Folded Reload
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; LA64-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload
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; LA64-NEXT: ld.d $s1, $sp, 16 # 8-byte Folded Reload
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; LA64-NEXT: ld.d $s0, $sp, 24 # 8-byte Folded Reload
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; LA64-NEXT: addi.d $sp, $sp, 32
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; LA64-NEXT: ret
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tail call void asm sideeffect "", "~{$f24},~{$f25},~{$r23},~{$r24}"()
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ret void
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}
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